XRT75VL00D datasheet(82/92 Pages) EXAR

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XRT75VL00D

E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER

REV. 1.0.3

• Using a particular clock edge within the "gapped" clock signal (from the Mapper IC) to sample and latch the

value of each DS3 data-bit that is output from the Mapper IC.

• To (through the user of the Jitter Attenuator block) attenuate the jitter within this "DS3 data" and "clock signal"

that is output from the Mapper IC.

• To convert this "smoothed" DS3 data and clock into industry-compliant DS3 pulses, and to output these

pulses onto the line.

To configure the LIU to operate in the correct mode for this application, the user must execute the following

configuration steps.

Configure the LIU to operate in the DS3 Mode

The user can configure a given channel (within the LIU) to operate in the DS3 Mode, by executing either of the

following steps.

• If the LIU has been configured to operate in the Host Mode

The user can accomplish this by setting both Bits 2 (E3_n) and Bits 1 (STS-1/DS3*_n), within each of the

"Channel Control Registers" to "0" as depicted below.

• If the LIU has been configured to operate in the Hardware Mode

The user can accomplish this by pulling all of the following input pins "Low".

Pin 76 - E3_0

Pin 94 - E3_1

Pin 85 - E3_2

Pin 72 - STS-1/DS3_0

Pin 98 - STS-1/DS3_1

Pin 81 - STS-1/DS3_2

Configure the LIU to operate in the Single-Rail Mode

Since the Mapper IC will typically output a single "Data Line" and a "Clock Line" for each DS3 signal that it

demaps from the incoming STS-N signal, it is imperative to configure each channel within the LIU to operate in

the Single Rail Mode.

The user can accomplish this by executing either of the following steps.

• If the LIU has been configured to operate in the Host Mode

The user can accomplish this by setting Bit 0 (SR/DR*), within the each of the "Channel Control" Registers to

1, as illustrated below.

CHANNEL CONTROL REGISTER - CHANNEL 0 ADDRESS LOCATION = 0X06

CHANNEL 1 ADDRESS LOCATION = 0X0E

CHANNEL 2 ADDRESS LOCATION = 0X16

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1

BIT 0

Unused

PRBS Enable

Ch_n

RLB_n

LLB_n

E3_n

STS-1/DS3_n

SR/DR_n

R/O

R/W

000

XRT75VL00D Datasheet(PDF) 82 Page - Exar Corporation

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