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AN2629 Datasheet(PDF) 13 Page - STMicroelectronics |
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AN2629 Datasheet(HTML) 13 Page - STMicroelectronics |
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13 / 43 page ![]() AN2629 Power supply Doc ID 13922 Rev 2 13/43 I/O states in Standby mode In Standby mode, all I/O pins are high impedance except: ● Reset pad (still available) ● TAMPER pin if configured for tamper or calibration out ● WKUP pin, if enabled 1.2.6 Debug mode By default, the debug connection is lost if the application puts the MCU in Stop or Standby mode while the debug features are used. This is due to the fact that the Cortex™-M3 core is no longer clocked. However, by setting some configuration bits in the DBGMCU_CR register, the software can be debugged even when using the low-power modes extensively. 1.2.7 Auto-wakeup (AWU) from low-power mode The RTC can be used to wakeup the MCU from low-power mode without depending on an external interrupt (Auto-wakeup mode). The RTC provides a programmable time base for waking up from Stop or Standby mode at regular intervals. For this purpose, two of the three alternative RTC clock sources can be selected by programming the RTCSEL[1:0] bits in the Backup domain control register (RCC_BDCR): ● Low-power 32.768 kHz external crystal oscillator (LSE OSC). This clock source provides a precise time base with very low-power consumption (less than 1µA added consumption in typical conditions) ● Low-power internal RC Oscillator (LSI RC) This clock source has the advantage of saving the cost of the 32.768 kHz crystal. This internal RC Oscillator is designed to add minimum power consumption. To wakeup from Stop mode with an RTC alarm event, it is necessary to: ● Configure the EXTI Line 17 to be sensitive to rising edge ● Configure the RTC to generate the RTC alarm To wakeup from Standby mode, there is no need to configure the EXTI Line 17. Table 5. Standby mode Standby mode Description Mode entry WFI (Wait for Interrupt) or WFE (Wait for Event) while: – Set SLEEPDEEP in Cortex-M3 System Control register – Set PDDS bit in Power Control register (PWR_CR) – Clear WUF bit in Power Control/Status register (PWR_CSR) Mode exit WKUP pin rising edge, RTC alarm, external Reset in NRST pin, IWDG Reset. Wakeup latency Regulator start up + Reset phase |
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