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AN2629 Datasheet(PDF) 33 Page - STMicroelectronics |
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AN2629 Datasheet(HTML) 33 Page - STMicroelectronics |
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33 / 43 page  AN2629 Optimizing power consumption in your application Doc ID 13922 Rev 2 33/43 6.3 Typical measurement results Table 9 shows the measurements made with these examples. 6.4 Conclusion To reduce power consumption, the STM32F10xxx has to be initialized with an optimized configuration according to the used application. For this reason, the user must focus on the application requirements and configure the STM32F10xxx accordingly. This example shows the possible STM32F10xxx clock configurations that can be used to optimize the power consumption of an application. They are described below: ● System and peripheral frequency – If the application does not need to run at the maximum frequency, the user can reduce HCLCK using the PLL or the prescaler divisor. – The peripheral bus frequency can be reduce using the APB1 and APB2 prescalers. Note: For more information on the clock tree, please refer to Figure 2 on page 15. ● Clock gating – To optimize power consumption only peripherals used has to be clocked. That can be done with clock gating configuration. Note: For more information on clock gating please refer to the STM32F10xxx reference manual. ● Prefetch or half cycle features – The prefetch feature is useful to enhance the performance. Using the prefetch buffer in an application prevents the performance loss caused by the Flash memory wait state. – In applications that are not sensitive to Flash memory wait states, the half cycle feature can be used to reduce consumption. Table 9. Example measurements APB1 APB2 Peripheral Frequency Prefetch Half cycle WFI Oscillator Typical consumption at 25 °C in mA DIV4 DIV2 ALL_ON 72 MHz ON OFF OFF HSE 33.35 DIV8 DIV8 ALL_ON 72 MHz ON OFF OFF HSE 27.85 DIV8 DIV8 USART 72 MHz ON OFF OFF HSE 25.13 DIV4 DIV2 USART 8 MHz ON OFF OFF HSE 9.23 DIV4 DIV2 USART 8 MHz OFF ON OFF HSE 6.42 DIV4 DIV2 USART 8 MHz OFF ON ON HSE 1.67 DIV4 DIV2 USART 8 MHz OFF ON ON HSI 1.09 |
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