Enterprise / Memory Line

PDS-PXE1-PXM1-C-001A

15

Package Layout Guidelines

Enterprise and memory controllers are built in either a 48-lead QFN package, or a 40-lead QFN package. Both

packages use a solid ring frame and the thermal pad design on the board should be based on the exposed paddle

area as shown in Figure 5 and Figure 6 for the 48-lead and 40-lead QFN packages, respectively.

The QFN package is designed to provide superior thermal performance which is mainly achieved by incorporating

an exposed die paddle on the bottom surface of the package. However, in order to take full advantage of this

feature, the PCB must be designed to effectively conduct heat away from the package. This can be achieved by

incorporating a thermal pad along with thermal vias directly under the package. While the thermal pad provides a

solderable surface on the top surface of the PCB (to solder the package die paddle onto the board), thermal vias are

needed to provide a thermal path to inner and/or bottom layers of the PCB to remove the heat.

Figure 5: 48-Lead QFN Package Paddle Dimensions (sawn and punched)