STM32WB55CCU6TR datasheet(53/193 Pages) STMICROELECTRONICS

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DS11929 Rev 10

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STM32WB55xx STM32WB35xx

Functional overview

The RTC is functional in VBAT mode and in all low-power modes when it is clocked by the

LSE. When clocked by one of the LSIs, the RTC is not functional in VBAT mode, but is

functional in all low-power modes except Shutdown mode.

All RTC events (Alarm, WakeUp Timer, Timestamp or Tamper) can generate an interrupt

and wakeup the device from the low-power modes.

3.22

Inter-integrated circuit interface (I2C)

The devices embed two I2Cs. Refer to Table 14 for the features implementation.

The I2C bus interface handles communications between the microcontroller and the serial

I2C bus. It controls all I2C bus-specific sequencing, protocol, arbitration and timing.

The I2C peripheral supports:



I2C-bus specification and user manual rev. 5 compatibility:

–

Slave and master modes, multimaster capability

–

Standard-mode (Sm), with a bitrate up to 100 kbit/s

–

Fast-mode (Fm), with a bitrate up to 400 kbit/s

–

Fast-mode Plus (Fm+), with a bitrate up to 1 Mbit/s and 20 mA output drive I/Os

–

7-bit and 10-bit addressing mode, multiple 7-bit slave addresses

–

Programmable setup and hold times

–

Optional clock stretching



System Management Bus (SMBus) specification rev 2.0 compatibility:

–

Hardware PEC (packet error checking) generation and verification with ACK

control

–

Address resolution protocol (ARP) support

–

SMBus alert



Power System Management Protocol (PMBus™) specification rev 1.1 compatibility



Independent clock: a choice of independent clock sources allowing the I2C

communication speed to be independent from the PCLK reprogramming. Refer to

Figure 9: Clock tree.



Wakeup from Stop mode on address match



Programmable analog and digital noise filters



1-byte buffer with DMA capability

Table 14. I2C implementation

I2C features(1)

I2C1

I2C3

Standard-mode (up to 100 kbit/s)

Fast-mode (up to 400 kbit/s)

Fast-mode Plus with 20 mA output drive I/Os (up to 1 Mbit/s)

Programmable analog and digital noise filters

SMBus/PMBus hardware support

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