| Electronic Components Datasheet Search |
|
STM32WB55CCU6TR Datasheet(PDF) 22 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32WB55CCU6TR Datasheet(HTML) 22 Page - STMicroelectronics |
|
22 / 193 page ![]() Functional overview STM32WB55xx STM32WB35xx 22/193 DS11929 Rev 10 3.5 Boot modes and FW update At startup, BOOT0 pin and BOOT1 option bit are used to select one of three boot options: Boot from user Flash Boot from system memory Boot from embedded SRAM The devices always boot on CPU1 core. The embedded bootloader code makes it possible to boot from various peripherals: USB UART I2C SPI Secure Firmware update (especially BLE and 802.15.4) from system boot and over the air is provided. 3.6 RF subsystem The STM32WB55xx and STM32WB35xx embed an ultra-low power multi-standard radio Bluetooth® Low Energy (BLE) and 802.15.4 network processor, compliant with Bluetooth® specification v5.0 and IEEE® 802.15.4-2011. The BLE features 1 Mbps and 2 Mbps transfer rates, supports multiple roles simultaneously acting at the same time as Bluetooth® Low Energy sensor and hub device, embeds Elliptic Curve Diffie-Hellman (ECDH) key agreement protocol, thus ensuring a secure connection. The Bluetooth® Low Energy stack and 802.15.4 Low Level layer run on an embedded Arm® Cortex®-M0+ core (CPU2). The stack is stored on the embedded Flash memory, which is also shared with the Arm® Cortex®-M4 (CPU1) application, making it possible in-field stack update. 3.6.1 RF front-end block diagram The RF front-end is based on a direct modulation of the carrier in Tx, and uses a low IF architecture in Rx mode. Thanks to an internal transformer at RF pins, the circuit directly interfaces the antenna (single ended connection, impedance close to 50 Ω). The natural bandpass behavior of the internal transformer, simplifies outside circuitry aimed for harmonic filtering and out of band interferer rejection. In Transmit mode, the maximum output power is user selectable through the programmable LDO voltage of the power amplifier. A linearized, smoothed analog control offers clean power ramp-up. In receive mode the circuit can be used in standard high performance or in reduced power consumption (user programmable). The Automatic gain control (AGC) is able to reduce the chain gain at both RF and IF locations, for optimized interference rejection. Thanks to the use of complex filtering and highly accurate I/Q architecture, high sensitivity and excellent linearity can be achieved. The bill of material is reduced thanks to the high degree of integration. The radio frequency source is synthesized form an external 32 MHz crystal that does not need any external |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |