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ATMEGA640 Datasheet(PDF) 161 Page - Microchip Technology |
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ATMEGA640 Datasheet(HTML) 161 Page - Microchip Technology |
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161 / 436 page  161 ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET] DS40002211A 17.11.30 ICR3H and ICR3L – Input Capture Register 3 17.11.31 ICR4H and ICR4L – Input Capture Register 4 17.11.32 ICR5H and ICR5L – Input Capture Register 5 The Input Capture is updated with the counter (TCNTn) value each time an event occurs on the ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture can be used for defining the counter TOP value. The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read simultaneously when the CPU accesses these registers, the access is performed using an 8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other 16-bit registers. See “Accessing 16-bit Registers” on page 135. 17.11.33 TIMSK1 – Timer/Counter 1 Interrupt Mask Register 17.11.34 TIMSK3 – Timer/Counter 3 Interrupt Mask Register 17.11.35 TIMSK4 – Timer/Counter 4 Interrupt Mask Register Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 65 43 2 1 0 (0x97) ICR3[15:8] ICR3H (0x96) ICR3[7:0] ICR3L Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 65 43 2 1 0 (0xA7) ICR4[15:8] ICR4H (0xA6) ICR4[7:0] ICR4L Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 7 65 43 2 1 0 (0x127) ICR5[15:8] ICR5H (0x126) ICR5[7:0] ICR5L Read/Write R/WR/W R/WR/W R/WR/W R/WR/W Initial Value 0 0 0 0 0 0 0 0 Bit 76543 2 1 0 (0x6F) – –ICIE1 – OCIE1C OCIE1B OCIE1A TOIE1 TIMSK1 Read/Write R R R/W R R/W R/W R/W R/W Initial Value 00000 0 0 0 Bit 76543 2 1 0 (0x71) – –ICIE3 – OCIE3C OCIE3B OCIE3A TOIE3 TIMSK3 Read/Write R R R/W R R/W R/W R/W R/W Initial Value 00000 0 0 0 Bit 76543 2 1 0 (0x72) – –ICIE4 – OCIE4C OCIE4B OCIE4A TOIE4 TIMSK4 Read/Write R R R/W R R/W R/W R/W R/W Initial Value 00000 0 0 0 |
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