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MC56F81663 Datasheet(PDF) 41 Page - NXP Semiconductors |
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MC56F81663 Datasheet(HTML) 41 Page - NXP Semiconductors |
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41 / 73 page  Figure 6 shows the definitions of the following signal states: • Active state, when a bus or signal is driven, and enters a low impedance state • Tri-stated, when a bus or signal is placed in a high impedance state • Data Valid state, when a signal level has reached VOL or VOH • Data Invalid state, when a signal level is in transition between VOL and VOH Data Invalid State Data1 Data3 Valid Data2 Data3 Data1 Valid Data Active Data Active Data2 Valid Data Tri-stated Figure 6. Signal states 10.3 Nonswitching electrical specifications 10.3.1 Voltage and current operating requirements This section includes information about recommended operating conditions. Table 7. Voltage and current operating requirements Symbol Description Min. Typ. Max. Unit Notes VDD Supply voltage 2.7 3.3 3.6 V — VDDA Analog supply voltage 2.7 3.3 3.6 V — VDD – VDDA VDD-to-VDDA differential voltage –0.1 0.1 V — VSS – VSSA VSS-to-VSSA differential voltage –0.1 0.1 V — VIH Input high voltage • 2.7 V ≤ VDD ≤ 3.6 V 0.7 × VDD — V — VIL Input low voltage • 2.7 V ≤ VDD ≤ 3.6 V — 0.35 × VDD V — VHYS Input hysteresis 0.06 × VDD — V — VIHOSC Oscillator Input Voltage High XTAL driven by an external clock source 2.0 VDD + 0.3 V — VILOSC Oscillator Input Voltage Low -0.3 0.8 V — IICIO IO pin negative DC injection current—single pin • VIN < VSS–0.3V –3 — mA 1 IICcont Contiguous pin DC injection current —regional limit, includes sum of negative injection currents of 16 contiguous pins — General MC56F81xxx, Rev. 1.1, 12/2020 NXP Semiconductors 41 |
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