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LP87702 Datasheet(PDF) 5 Page - Texas Instruments |
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LP87702 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 98 page ![]() 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted)(1) (2) MIN MAX UNIT VIN_B0, VIN_B1, SW_BST, VANA Voltage on input power connections –0.3 6 V SW_B0, SW_B1 Voltage on buck switch nodes –0.3 (VIN_Bx + 0.3 V) with 6-V maximum V FB_B0, FB_B1 Voltage on buck voltage sense nodes –0.3 (VANA + 0.3 V) with 6-V maximum V VOUT_BST Voltage on boost output –0.3 6 V SCL (EN2), SDA (EN3), VMON1, VMON2 Voltage on voltage monitoring pins –0.3 (VANA + 0.3 V) with 6-V maximum V NRST, EN1, nINT Voltage on logic pins (input or output pins) –0.3 6 V PG0, PG1 (GPO1), GPO0, CLKIN (GPO2), WDI, WD_RESET Voltage on logic pins (input or output pins) –0.3 (VANA + 0.3 V) with 6-V maximum V TJ-MAX Junction temperature −40 150 °C Tstg Storage temperature –65 150 °C Maximum lead temperature (soldering, 10 sec.) 260 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to network ground. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per AEC Q100-002(1) ±2000 V Charged-device model (CDM), per AEC Q100-011 All pins ±500 Corner pins (1, 8, 9, 16, 17, 24, 25, 32) ±750 (1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification. 6.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT INPUT VOLTAGE VIN_B0, VIN_B1, SW_BST, VANA Voltage on input power connections 2.8 5.5 V VMON1, VMON2 Voltage on voltage monitoring pins 0 5.5 V NRST, EN1, EN2, EN3, nINT Voltage on logic pins (input or output pins) 0 5.5 PG0, PG1 (GPO1), GPO0, CLKIN (GPO2), WDI, WD_RESET Voltage on logic pins (input or output pins) 0 VANA V SCL, SDA Voltage on I2C interface, Standard (100 kHz), Fast (400 kHz), Fast+ (1 MHz), and High-Speed (3.4 MHz) Modes 0 1.95 V Voltage on I2C interface, Standard (100 kHz), Fast (400 kHz), and Fast+ (1 MHz) Modes 0 VANA with 3.6-V maximum V TEMPERATURE www.ti.com LP87702 SNVSBU3 – MARCH 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: LP87702 |
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