STM32H723VG datasheet(153/227 Pages) STMICROELECTRONICS

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DS13313 Rev 2

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STM32H723xE/G

Electrical characteristics

208

Table 77. OCTOSPI characteristics in DTR mode (with DQS)/Octal and Hyperbus(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

FCK(2)(3)

OCTOSPI clock frequency

2,7 V < VDD < 3.6 V,

VOS0, CLOAD = 20 pF

100

MHz

1.71 V < VDD < 3.6 V,

VOS0, CLOAD = 20 pF

100(4)

tw(CKH)

OCTOSPI clock high and

low time, even division

PRESCALER[7:0] = n =

0,1,3,5

t(CK)/2

t(CK)/2+1

tw(CKL)

t(CK)/2–1

t(CK)/2

tw(CKH)

OCTOSPI clock high and

low time, odd division

PRESCALER[7:0] = n =

2,4,6,8

(n/2)*t(CK)/

(n+1)

(n/2)*t(CK)/

(n+1)+1

tw(CKL)

(n/2+1)*t(CK)/(

n+1)–1

(n/2+1)*t(CK)/

(n+1)

tv(CK)

Clock valid time

t(CK)+1

th(CK)

Clock hold time

t(CK)/2

VODr(CK)

CK,CK crossing level on CK

rising edge

VDD = 1.8 V

922

1229

VODf(CK)

CK,CK crossing level on CK

falling edge

VDD = 1.8 V

1000

1277

tw(CS)

Chip select high time

3*t(CK)

tv(DQ)

Data input vallid time

tv(DS)

Data strobe input valid time

th(DS)

Data strobe input hold time

tv(RWDS)

Data strobe output valid

time

3 x t(CK)

tsr(DQ)

Data input setup time

Rising edge

tsf(DQ)

Falling edge

thr(DQ)

Data input hold time

Rising edge

thf(DQ)

Falling edge

tvr(OUT)

Data output valid time rising

edge

DHQC = 0

7(5)

DHQC = 1,

Prescaler = 1,2...

tpclk/4+

tpclk/4+1.25

(5)

tvf(OUT)

Data output valid time

falling edge

DHQC = 0

5.5

6(5)

DHQC = 1,

Prescaler = 1,2...

tpclk/4+

0.5

tpclk/4+0.75

(5)

thr(OUT)

Data output hold time rising

edge

DHQC = 0

4.5

DHQC = 1,

Prescaler = 1,2...

tpclk/4

thf(OUT)

Data output hold time falling

edge

DHQC = 0

4.5

DHQC = 1,

Prescaler = 1,2...

tpclk/4

1. Guaranteed by characterization results.

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