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FTS64K Datasheet(PDF) 31 Page - Freescale Semiconductor, Inc |
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FTS64K Datasheet(HTML) 31 Page - Freescale Semiconductor, Inc |
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31 / 44 page ![]() FTS64K Block User Guide — Version V01.00 31 Figure 4-1 PRDIV8 and FDIV bits Determination Procedure PRDIV8=1 yes no PRDIV8=0 (reset) 12.8MHz? FCLK=(PRDCLK)/(1+FDIV[5:0]) PRDCLK=oscillator clock PRDCLK=oscillator clock/8 PRDCLK[MHz]*(5+Tbus[ µs]) no FDIV[5:0]=PRDCLK[MHz]*(5+Tbus[ µs]) - 1 yes START Tbus < 1 µs? an integer? FDIV[5:0]=INT(PRDCLK[MHz]*(5+Tbus[ µs])) 1/FCLK[MHz] + Tbus[ µs] > 5 AND FCLK > 0.15MHz ? END yes no FDIV> 4? PROGRAM/ERASE IMPOSSIBLE yes no PROGRAM/ERASE IMPOSSIBLE no TRY TO DECREASE Tbus yes oscillator clock Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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