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MCP3462 Datasheet(PDF) 64 Page - Microchip Technology |
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MCP3462 Datasheet(HTML) 64 Page - Microchip Technology |
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64 / 108 page  MCP3461/2/4 DS20006180D-page 64 2019-2021 Microchip Technology Inc. FIGURE 6-5: Single Register Write Communication (CMD[1:0] = 10) Timing Diagram. FIGURE 6-6: Multiple Register Write Within One Communication Using Incremental Write Feature. SPI Mode 1,1; Example with a 24-Bit Wide Register Located at Address CMD[5:2] SPI Mode 0,0; Example with a 24-Bit Wide Register Located at Address CMD[5:2] Don’t Care SCK SDI SDO CS High-Z Device Latches SDI on Rising Edge Don’t Care DATA[23] Don’t Care SCK SDI SDO CS High-Z Device Latches SDI on Rising Edge 0 Don’t Care DATA[0] A[6] High-Z 0 0 0 0 0 High-Z 0 ... ADDR ... 0xD Complete Write Sequence Rollover ADDRESS SET 0x1 Don’t Care SCK SDI SDO CS High-Z 8x COMMAND BYTE Depends on ADDR ADDR ... ADDR = 0xD CMD[7:6] + ADDR +10 Complete Write Sequence ADDR + 1 Depends on ADDR + 1 ... 8x 8x ADDR = 0x1 ... Complete Write Sequence ADDR = 0x2 8x ... 8x ADDR = 0xD 00xxxxxx Depends on IRQ Status and Device Address High-Z 0 |
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