MCP3462 datasheet(8/108 Pages) MICROCHIP

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MCP3461/2/4

DS20006180D-page 8

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Integral Nonlinearity

(

Note 7)

INL

-10

—

+10

ppm FSR GAIN = 0.33 (

Note 2)

-7

—

GAIN = 1 (

Note 2)

-7

—

GAIN = 2 (

Note 2)

—

+10

GAIN = 4 (

Note 2)

-20

—

+20

GAIN = 8 (

Note 2)

-32

—

+32

GAIN = 16 (

Note 2)

AVDD Power Supply

Rejection Ratio

DC PSRR

—

-76 – 20 * LOG

(GAIN)

—dB

AVDD varies from 2.7V to

3.6V, VIN =0V

DVDD Power Supply

Rejection Ratio

—-110

—

DVDD varies from 1.8V to

3.6V, VIN =0V

DC Common-Mode

Rejection

DC CMRR

—

-126

—

VINCOM varies from 0V to

AVDD, VIN =0V

AC Performance

Signal-to-Noise and

Distortion Ratio

SINAD

96.9

97.2

—

AVDD =DVDD =VREF =3.3V

and TA = +25°C (Note 2)

Signal-to-Noise Ratio

SNR

97.3

—

dBc

AVDD =DVDD =VREF =3.3V

and TA = +25°C (Note 2)

Total Harmonic Distortion

THD

—

-116

-110

AVDD =DVDD =VREF =3.3V

and TA = +25°C. Includes the

first 10 harmonics (

Note 2)

Spurious-Free Dynamic

Range

SFDR

110

120

—

dBc

AVDD =DVDD =VREF =3.3V

and TA = +25°C (Note 2)

Input Channel Crosstalk

CTALK

—

-130

—

VIN = 0V, perturbation = 0 dB

at 50 Hz, applies for all

perturbation channels and

all input channels

AC Power Supply

Rejection Ratio

AC PSRR

—

-75 – 20 * LOG

(GAIN)

—dB

VIN =0V, DVDD =3.3V,

AVDD =3.3V+0.3 VP at

50 Hz

AC Common-Mode

Rejection Ratio

AC CMRR

—

-122

—

VINCOM = 0 dB at 50 Hz,

VIN =0V

ADC Timing Parameters

Sampling Frequency

DMCLK

See

Table 5-6

MHz

See

Figure 4-1

Output Data Rate

DRCLK

See

Table 5-6

ksps

See

Figure 4-1

Data Conversion Time

TCONV

See

Table 5-6

See

Figure 4-1

ELECTRICAL CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise indicated, all parameters apply at AVDD = 2.7V to 3.6V,

DVDD = 1.8V to AVDD + 0.1V, MCLK = 4.9152 MHz, VREF =AVDD, ADC_MODE[1:0] = 11. All other register map bits to their

default conditions. TA = -40°C to +125°C, VIN = -0.5 dBFS at 50 Hz.

Parameter

Sym.

Min.

Typ.

Max.

Units

Test Conditions

Note 1:

This parameter is ensured by design and not 100% tested.

This parameter is ensured by characterization and not 100% tested.

REFIN- should be connected to ground for single-ended measurements.

Full Scale Range (FSR) = 2 * VREF/GAIN.

This input impedance is due to the internal input sampling capacitor and frequency. This impedance is measured

between the two input pins of the channel selected with the input multiplexer.

Applies to all analog gains. Offset and gain errors depend on gain settings. See

Section 2.0 “Typical

Performance Curves”.

INL is the difference between the endpoints line and the measured code at the center of the quantization band.

DIDD is measured while no transfer is present on the SPI bus.

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