AT25QL641 datasheet(63/77 Pages) DIALOG

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AT25QL641

DS-25QL641–130E–10/2018

7.38

Exit Secured OTP (C1h)

The Exit Secured OTP instruction is for exiting the additional 4 Kbit secured OTP mode. (Please refer to Figure 7-60).

Figure 7-60. Exit Secured OTP instruction for SPI Mode (left) and QPI Mode (right)

7.39

Read Security Register (2Bh)

The Read Security Register can be read the value of Security Register bits at any time (even in program/erase/write

status register-1 and write status register-2 condition) and continuously. Bits 0 and 1 of this register are described below.

All other bits of the register are reserved.

Secured OTP Indicator bit. The Secured OTP indicator bit shows the chip is locked by factory before or not. When it is

“0”, it indicates a non-factory lock, a “1” indicates a factory lock.

Lock-down Secured OTP (LDSO) bit. By executing the ‘Write Security Register’ instruction, the LDSO bit may be set to

“1” for customer lock down purposes. However, once the bit it set to “1” (locked down), the LDSO bit and the 4 Kbit

Secured OTP area cannot be updated any more. While it is in 4 Kbit Secured OTP mode, array access is not allowed to

write.

Table 7-12. Security Register Definition

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

LDSO (indicate if

lock- down)

Secured OTP

indicator bit

Reserved

0 = not

lock-down

1 = lock- down

(cannot program/

erase OTP)

0 = non factory

lock

1 = factory lock

Volatil

e bit

Volatile

bit

Volatile

bit

Volatile

bit

Volatile

bit

Volatile

bit

Non- Volatile bit

Non- Volatile

bit

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