IMX6SDLCEC datasheet(136/169 Pages) NXP

136 / 169 page

i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 9, 11/2018

136

NXP Semiconductors

Package Information and Contact Assignments

This section includes the contact assignment information and mechanical package drawing.

6.1

Updated Signal Naming Convention

The signal names of the i.MX6 series of products have been standardized to better align the signal names

within the family and across the documentation. Some of the benefits of these changes are as follows:

•

The names are unique within the scope of an SoC and within the series of products

•

Searches will return all occurrences of the named signal

•

The names are consistent between i.MX 6 series products implementing the same modules

•

The module instance is incorporated into the signal name

This change applies only to signal names. The original ball names have been preserved to prevent the need

to change schematics, BSDL models, IBIS models, etc.

SPI

ECSPI-4

EIM_D22, EIM_D28, EIM_D21, EIM_D20, EIM_A25,

EIM_D24, EIM_D25

—

EIM

EIM_DA[15:0], EIM_D[31:16], CSI0_DAT[19:4],

CSI0_DATA_EN, CSI0_VSYNC

Used for NOR, OneNAND boot

Only CS0 is supported

NAND Flash

GPMI

NANDF_CLE, NANDF_ALE, NANDF_WP_B,

SD4_CMD, SD4_CLK, NANDF_RB0, SD4_DAT0,

NANDF_CS0, NANDF_CS1, NANDF_CS2,

NANDF_CS3, NANDF_D[7:0]

8 bit

Only CS0 is supported

SD/MMC

USDHC-1

SD1_CLK, SD1_CMD, SD1_DAT0, SD1_DAT1,

SD1_DAT2, SD1_DAT3, GPIO_1, NANDF_D0,

NANDF_D1, NANDF_D2, NANDF_D3, KEY_COL1

1, 4, or 8 bit

SD/MMC

USDHC-2

SD2_CLK, SD2_CMD, SD2_DAT0, SD2_DAT1,

SD2_DAT2, SD2_DAT3, GPIO_4, NANDF_D4,

NANDF_D5, NANDF_D6, NANDF_D7, KEY_ROW1

1, 4, or 8 bit

SD/MMC

USDHC-3

SD3_CLK, SD3_CMD, SD3_DAT0, SD3_DAT1,

SD3_DAT2, SD3_DAT3, SD3_DAT4, SD3_DAT5,

SD3_DAT6, SD3_DAT7, SD3_RST, GPIO_18

1, 4, or 8 bit

SD/MMC

USDHC-4

SD4_CLK, SD4_CMD, SD4_DAT0, SD4_DAT1,

SD4_DAT2, SD4_DAT3, SD4_DAT4, SD4_DAT5,

SD4_DAT6, SD4_DAT7, NANDF_ALE, NANDF_CS1

1, 4, or 8 bit

I2CI2C-1

EIM_D28, EIM_D21

—

I2CI2C-2

EIM_D16, EIM_EB2

—

I2CI2C-3

EIM_D18, EIM_D17

—

USB

USB-OTG

PHY

USB_OTG_DP

USB_OTG_DN

USB_OTG_VBUS

—

Table 94. Interface Allocation During Boot (continued)

Interface

IP Instance

Allocated Pads During Boot

Comment

IMX6SDLCEC Datasheet(PDF) 136 Page - NXP Semiconductors

IMX6SDLCEC Datasheet(HTML) 136 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL