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ZLP12840 Datasheet(PDF) 31 Page - Zilog, Inc. |
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ZLP12840 Datasheet(HTML) 31 Page - Zilog, Inc. |
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31 / 58 page ![]() PS024406-0106 P R E L I M I N A R Y Port Configuration Register (PCON) ZLP12840 OTP MCU Product Specification 20 Port Configuration Register (PCON) The Port Configuration (PCON) register, shown in Table 9, configures the Port 0 output mode and the comparator output on Port 3. The PCON register is located in expanded reg- ister Bank F, address 00h. This register is not reset after a stop-mode recovery. Table 9. Port Configuration Register (PCON) Bit 7 6 5 4 3 2 1 0 Field Reserved Port 0 Output Mode Reserved Comp./IR Amp. Output Port 3 Reset X X X X X 1 X 0 R/W W W Address Bank F: 00h; Linear: F00h Bit Position Value Description [7:3] ReservedWrites have no effect; reads 11111b. [2] 0 1 Port 0 Output ModeControls the output mode of port 0. Write only; reads return 1. Open-drain Push/pull [1] ReservedWrites have no effect; reads 1. [0] 0 1 Comparator or IR Amplifier Output Port 3 Select digital outputs or comparator and IR amplifier outputs on P34 and P37. Write only; reads return 1. P34 and P37 outputs are digital. P34 is Comparator 1 or IR Amplifier output, P37 is Comparator 2 output. Note: |
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