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ZLP12840 Datasheet(PDF) 35 Page - Zilog, Inc. |
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ZLP12840 Datasheet(HTML) 35 Page - Zilog, Inc. |
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35 / 58 page  PS024406-0106 P R E L I M I N A R Y Port 2 Register ZLP12840 OTP MCU Product Specification 24 Port 2 Register The Port 2 Register allows read and write access to the Port 2 pins. See Table 13. Table 13. Port 2 Register (P2) Bit 7 6 5 4 3 2 1 0 Field P27 P26 P25 P24 P23 P22 P21 P20 Reset XX X XXX XX R/W R/W R/W R/W R/W R/W R/W R/W R/W Address Bank 03: 02h; Linear: 002h Bit Position Value Description [7:0] Read: 0 1 Write: 0 1 Port 2 Pins 70Each bit provides access to the corresponding Port 2 pin. (Pin configured as input or output in P2M register.) Pin level is Low. Pin level is High. (Pin configured as output in P2M register.) Assert pin Low. Assert pin High if configured as push-pull; make pin high-impedance if it is open drain. |
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