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ADP5360ACBZ-1-R7 Datasheet(PDF) 31 Page - Analog Devices |
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ADP5360ACBZ-1-R7 Datasheet(HTML) 31 Page - Analog Devices |
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31 / 60 page ![]() Data Sheet ADP5360 Rev. 0 | Page 31 of 60 PGOOD Indication The VOUT2OK bit, Address 0x2F, indicates whether the buck boost regulator is working properly. Alogic high indicates that the output voltage of the buck boost regulator is higher than 90% (typical rising threshold) of the nominal output. When the regulated output voltage falls lower than 87% (typical falling threshold) of the nominal output, the VOUT2OK bit goes low. The VOUT2OK bit status indication can be masked to the PGOOD1 pin or PGOOD2 pin by setting the PGOODx_MASK register with the I2C interface. Soft Start The ADP5360 buck boost regulator has an internal soft start function that ramps up the output voltage in a controlled manner upon startup, thereby limiting the inrush current. This feature prevents possible input voltage drops when a battery or a high impedance power source is connected to the input of the device. The default typical soft start time is 1 ms for the regulator. Other soft start times (8 ms, 64 ms, and 512 ms) can be programmed for the ADP5360 by the I2C interface. Active Discharge The ADP5360 integrates an optional discharge switch from the output node to ground. This switch turns on when the associated regulator is disabled to help discharge the output capacitor quickly. The typical value of the discharge switch is 255 Ω for the regulator. The active discharge feature can be enabled by setting the DISCHG_BUCKBST bit, Address 0x2B, high for the buck boost regulator. Current-Limit Protection The buck boost regulator in the ADP5360 includes peak current- limit protection circuitry to limit the amount of positive current flowing through the high-side MOSFET switch. The peak current limit on the power switch limits the amount of current that can flow from the input to the output. The programmable current- limit threshold feature allows for the use of small size inductors for low current applications. Use the BUCKBST_ILIM[2:0] bits, Address 0x2B, via the I2C interface to program the peak current-limit threshold on the buck boost regulator. Three bit-programmable options provide 100 mAto 800 mA of peak current limit with a 100 mA step peak current threshold range. Use the following equation to find the regulator output current: ILOAD2 = VIN2 × IPEAK2/2(VIN2 + VOUT2) where: ILOAD2 is the regulator output current. VIN2 is the regulator input voltage. IPEAK2 is the inductor peak current. VOUT2 is the output voltage. The peak current limit is different than the average current limit on the battery input side. The average battery current is a factor in different elements including, but not limited to, the VIN2/VOUT2 relationship, the inductance, the switching frequency, and the peak current-limit threshold. The average battery current limit on each buck or buck boost regulator can be roughly calculated and predicted by these elements. However, the average current-limit accuracy is difficult to guarantee due to variations in inductance and switching frequency. Therefore, a careful calculation must be obtained if the input source is coming from a weak battery, which typically has high output impedance. Stop Switching The stop feature also can configure the buck boost regulator with the STP pin input, which allows the user to temporarily stop buck boost regulator switching. When applyin a logic high level to the STP pin, the corresponding regulator is forced to stop switching immediately. When applying a logic low level to the STP pin, the regulator resumes switching. Note that tens of ns delay time exists from when the STP signal goes high to when switching fully stops. The stop signal control is valid only when the regulator is enabled. Otherwise, the stop signal is ignored. Set the STP_BUCKBST bit, Address 0x2B, low to disable the buck boost regulator stop switching feature. SUPERVISORY Reset Output TheADP5360 provides microprocessor supply voltage supervision by controlling the reset input of the microprocessor. When the monitored voltage falls lower than the associated threshold, the RESET pin asserts correspondingly. Asserting the RESET pin quickly ensures that the entire system is reset immediately before any part of the system voltage falls lower than the recommended operating voltage. The default monitor voltage is the buck output voltage (VOUT1) and can be selected as VOUT2 by the I2C interface. The RESET pin monitors both VOUT1 of the buck and VOUT2 of the buck boost when setting the VOUT1_RST bit and VOUT2_RST bit of Address 0x2D both high. |
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