MIC2582 datasheet(11/32 Pages) MICROCHIP

11 / 32 page



2021 Microchip Technology Inc.

DS20006573A-page 11

MIC2582/3

3.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

PIN FUNCTION TABLE

Pin Number

SOIC-8

Pin Number

QSOP-16

Pin Name

Description

/POR

Power-on-Reset output: Open-drain N-channel device, active-low.

This pin remains asserted during start-up until a time period (tPOR)

after the FB pin voltage rises above the power good threshold

(VFB). The timing capacitor CPOR determines tPOR. When the out-

put voltage monitored at the FB pin falls below VFB, /POR is

asserted for a minimum of one timing cycle (tPOR). The /POR pin

requires a pull-up resistor (10 kΩ minimum) to VCC.

ON input: Active-high. The ON pin is an input to a Schmitt-triggered

comparator used to enable/disable the controller, is compared to a

1.24V reference with 50 mV of hysteresis. When a logic high is

applied to the ON pin (VON > 1.24V), a start-up sequence begins

and the GATE pin starts ramping up towards its final operating volt-

age. When the ON pin receives a logic low signal (VON < 1.19V),

the GATE pin is grounded and /FAULT remains high if VCC is above

the UVLO threshold. ON must be low for at least 20 µs after VCC is

above the UVLO threshold in order to initiate a start-up sequence.

Additionally, toggling the ON pin LOW to HIGH resets the circuit

breaker.

CPOR

Power-on-Reset timer: A capacitor connected between this pin and

ground sets the supply contact start-up delay (tSTART) and the

power-on reset interval (tPOR). When VCC rises above the UVLO

threshold, and the ON pin is above the ON threshold, the capacitor

connected to CPOR begins to charge. When the voltage at CPOR

crosses 0.3V, the start-up threshold (VSTART), a start cycle is initi-

ated if ON is asserted while capacitor CPOR is immediately dis-

charged to ground. When the voltage at FB rises above VFB,

capacitor CPOR begins to charge again. When the voltage at

CPOR rises above the power-on reset delay threshold (VTH), the

timer resets by pulling CPOR to ground, and /POR is de-asserted.

If CPOR is left open, then tSTART defaults to 20 µs.

7, 8

GND

Ground connection: Tie to analog ground.

Power Good Threshold input (Undervoltage detect): This input is

internally compared to a 1.24V reference with 30 mV of hysteresis.

An external resistive divider may be used to set the voltage at this

pin. If this input momentarily goes below 1.24V, then /POR is acti-

vated for one timing cycle, tPOR, indicating an output undervoltage

condition. The /POR signal de-asserts one timing cycle after the FB

pin exceeds the power good threshold by 30 mV. A 5 µs filter on

this pin prevents glitches from inadvertently activating this signal.

GATE

Gate Drive output: Connects to the gate of an external N-channel

MOSFET. An internal clamp ensures that no more than 9V is

applied between the GATE pin and the source of the external MOS-

FET. The GATE pin is immediately brought low when either the cir-

cuit breaker trips or an undervoltage lockout condition occurs.

MIC2582 Datasheet(PDF) 11 Page - Microchip Technology

MIC2582 Datasheet(HTML) 11 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datasheet Download

Link URL