MIC2582 datasheet(16/32 Pages) MICROCHIP

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MIC2582/3

DS20006573A-page 16



2021 Microchip Technology Inc.

5.0

APPLICATION INFORMATION

5.1

Design Consideration for Output

Undervoltage Detection

For output undervoltage detection, the first

consideration is to establish the output voltage level

that indicates “power is good.” For this example, the

output value for which a 12V supply will signal “good” is

11V. Next, consider the tolerances of the input supply

and FB threshold (VFB). For this example, the 12V

supply varies ±5%, thus the resulting output voltage

may be as low as 11.4V and as high as 12.6V.

Additionally, the FB threshold has ±50 mV tolerance

and may be as low as 1.19V and as high as 1.29V.

Thus, to determine the values of the resistive divider

network (R5 and R6) at the FB pin, shown in the Typical

Application Circuit, use the following iterative design

procedure.

• Choose R6 to allow 100 µA or more in the FB

resistive divider branch.

EQUATION 5-1:

• Next, determine R5 using the output “good”

voltage of 11V and the following equation.

EQUATION 5-2:

Using some basic algebra and simplifying Equation 5-2

to isolate R5 yields:

EQUATION 5-3:

Substituting these values into Equation 5-3 now yields

R5 = 93.33 kΩ. A standard 93.1 kΩ ±1% is selected.

Now, consider the 11.4V minimum output voltage, the

lower tolerance for R6 and higher tolerance for R5,

12.28 kΩ and 94.03 kΩ, respectively. With only 11.4V

available, the voltage sensed at the FB pin exceeds

VFB(MAX), thus the /POR and PWRGD (MIC2583/3R)

signals will transition from LOW to HIGH, indicating

“power is good” given the worse case tolerances of this

example. Lastly, in giving consideration to the leakage

current associated with the FB input, it is

recommended to either provide ample design margin

(20 mV to 30 mV) to allow for loss in the potential (∆V)

at the FB pin, or allow >100 µA to flow in the FB resistor

network.

5.2

PCB Connection Sense

There are several configuration options for the

MIC2582/83’s ON pin to detect if the PCB has been

fully seated in the backplane before initiating a start-up

cycle. In the Typical Application Circuit, the

MIC2582/83 is mounted on the PCB with a resistive

divider network connected to the ON pin. R2 is

connected to a short pin on the PCB edge connector.

Until the connectors mate, the ON pin is held low, which

keeps the GATE output charge pump off. Once the

connectors mate, the resistor network is pulled up to

the input supply, 12V in this example, and the ON pin

FIGURE 5-1:

PCB Connection Sense with ON/OFF Control.

VFB MAX





100A

-------------------------

1.29V

100A

-----------------

12.9k

R6 is chosen as 12.4 kΩ ±1%.

VOUT GOOD





VFB

R5 R6

--------------------



VOUT GOOD





VFB MAX





----------------------------------













–



Where:

VFB(MAX) = 1.29V

VOUT(GOOD) = 11V

R6 = 12.4 kΩ

GND

/ON_OFF

0.05μF

SENSE

VCC

CPOR

DIS

GATE

GND

/POR

/FAULT

Long

Backplane

Connector

PCB Edge

Connector

Long

Medium or

Short Pin

Undervoltage (Output) = 4.45V

/POR Delay = 25ms

START-UP Delay = 6ms

*Q2 is TN0201T (SOT-23)

**R8 is optional for noise filtering

Additional pins omitted for clarity.

Downstream

Signal

Short

PCB Connection Sense

Si7860DP

(PowerPAK SOIC-8)

**R8

10.5k

20k

33k

100

*Q2

MIC2583

1μF

0.01μF

20k

CLOAD

220μF

33k

27.4k

VOUT

5V@3A

VIN

/FAULT

7,8

RSENSE

0.010

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