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MMPF0200Z Datasheet(PDF) 110 Page - NXP Semiconductors

Part # MMPF0200Z
Description  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMPF0200Z Datasheet(HTML) 110 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
110
Freescale Semiconductor
PF0200Z
Typical Applications
PF0200Z Layout Guidelines
7.2.3
General Routing Requirements
1. Some recommended things to keep in mind for manufacturability:
•
Via in pads require a 4.5 mil minimum annular ring. Pad must be 9.0 mils larger than the hole
•
Maximum copper thickness for lines less than 5.0 mils wide is 0.6 oz copper
•
Minimum allowed spacing between line and hole pad is 3.5 mils
•
Minimum allowed spacing between line and line is 3.0 mils
2. Care must be taken with SWxFB pins traces. These signals are susceptible to noise and must be routed far away from
power, clock, or high power signals, like the ones on the SWxIN, SWx, SWxLX, SWBSTIN, SWBST, and SWBSTLX pins.
They could be also shielded.
3. Shield feedback traces of the regulators and keep them as short as possible (trace them on the bottom so the ground and
power planes shield these traces).
4. Avoid coupling traces between important signal/low noise supplies (like REFCORE, VCORE, VCOREDIG) from any
switching node (i.e. SW1ALX, SW1BLX, SW2LX, SW3ALX, SW3BLX, and SWBSTLX).
5. Make sure that all components related to a specific block are referenced to the corresponding ground.
7.2.4
Parallel Routing Requirements
1. I2C signal routing
•
CLK is the fastest signal of the system, so it must be given special care.
•
To avoid contamination of these delicate signals by nearby high power or high frequency signals, it is a good
practice to shield them with ground planes placed on adjacent layers. Make sure the ground plane is uniform
throughout the whole signal trace length.
Figure 25. Recommended Shielding for Critical Signals
•
These signals can be placed on an outer layer of the board to reduce their capacitance with respect to the ground
plane.
•
Care must be taken with these signals not to contaminate analog signals, as they are high frequency signals.
Another good practice is to trace them perpendicularly on different layers, so there is a minimum area of proximity
between signals.



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