9 / 13 page
FS8160
Page 9
April 2003
Similarly, the 16-bit main and auxiliary input (N) divider ratios are specified by the
MAINA[3:0] + MAINB[11:0] and AUXA[3:0] + AUXB[11:0] bits, respectively, and are
defined in the table below.
The charge pump control bits CP_CNTRL[3:0] set (1) the phase detector polarity and (2)
the magnitude of the charge pump source/sink current, and are defined below.
Table 4: Input divider ratios
Divide
Ratio
MAINB[11:0] and AUXB[11:0]
Divide
Ratio
MAINA[3:0] and
AUXA[3:0]
11
10
9876543210
3210
3
000000000011
0
0000
4
000000000100
1
0001
•
••••••••••••
•
••••
4095
111111111111
15
1111
Table 5: Charge pump and PFD control bits
Bit
Latch Location
Function
“0”
“1”
CP_CNTRL[3]
Main R, bit 17
Aux. charge pump current
Low, 160
µA
High, 1600
µA
CP_CNTRL[2]
Main R, bit 16
Main charge pump current
Low, 160
µA
High, 1600
µA
CP_CNTRL[1]
Main R, bit 15
Aux. phase/frequency detector polaritya
a. When the VCO frequency increases with increasing control voltage, set the phase/frequency detector
polarity to positive. When the VCO frequency decreases with increasing control voltage, set the
phase/frequency detector polarity to negative.
Negative
Positive
CP_CNTRL[0]
Main R, bit 14
Main phase/frequency detector polarity
Negative
Positive
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
