SPC572LX datasheet(86/112 Pages) STMICROELECTRONICS

86 / 112 page

Electrical characteristics

SPC572Lx

86/112

DocID027866 Rev 5

Figure 33. DSPI Slave Mode - Modified transfer format timing (MFTE = 0/1) —

CPHA = 0

tSUO

SOUT Valid Time(2),(3),(4)

(after SCK edge)

Very Strong

25 pF

—

Strong

50 pF

—

Medium

50 pF

—

tHO

SOUT Hold Time(2),(3),(4)

(after SCK edge)

Very Strong

25 pF

2.5

—ns

Strong

50 pF

2.5

—ns

Medium

50 pF

2.5

—ns

1. DSPI slave operation is only supported for a single master and single slave on the device. Timing is valid for that case only.

2. Input timing assumes an input slew rate of 1 ns (10% - 90%) and uses TTL / Automotive voltage thresholds.

3. All timing values for output signals in this table, are measured to 50% of the output voltage.

4. All output timing is worst case and includes the mismatching of rise and fall times of the output pads.

Table 45. DSPI CMOS Slave timing - Modified Transfer Format (MTFE = 0/1)(1) (continued)

Symbol

Characteristic

Condition

Min

Max

Unit

Pad Drive

Load

Last Data

First Data

Data

SIN

SOUT

SCK Input

First Data

Last Data

SCK Input

(CPOL=0)

(CPOL=1)

tSCK

tDIS

tSDC

tCSC

tASC

tSUI

tHI

tSUO

tHO

SPC572LX Datasheet(PDF) 86 Page - STMicroelectronics

SPC572LX Datasheet(HTML) 86 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL