SPC572LX datasheet(87/112 Pages) STMICROELECTRONICS

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SPC572Lx

Electrical characteristics

111

Figure 34. DSPI Slave Mode - Modified transfer format timing (MFTE = 0/1) —

CPHA = 1

3.17.3

FEC timing

3.17.3.1

RMII serial management channel timing (MDIO and MDC)

The FEC functions correctly with a maximum MDC frequency of 2.5 MHz.

Last Data

SIN

SOUT

First Data

Data

SCK Input

(CPOL=0)

(CPOL=1)

tDIS

tSUI

tHI

tSUO

tHO

Table 46. RMII serial management channel timing(1)

Symbol

Characteristic

Value

Unit

Min

Max

M10

D MDC falling edge to MDIO output invalid

(minimum propagation delay)

0—

M11

D MDC falling edge to MDIO output valid

(maximum propagation delay)

—25

M12

D MDIO (input) to MDC rising edge setup

—

M13

D MDIO (input) to MDC rising edge hold

—

M14

D MDC pulse width high

40%

60%

MDC period

M15

D MDC pulse width low

40%

60%

MDC period

1. All timing specifications are referenced from MDC = 1.4 V (TTL levels) to the valid input and output levels, 0.8 V and 2.0 V

(TTL levels). For 5 V operation, timing is referenced from MDC = 50% to 2.2 V/3.5 V input and output levels.

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