71M6545HT-IGTRSLASHF datasheet(32/66 Pages) MAXIM

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71M6545T/71M6545HT

Energy Meter ICs

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In SLP mode, it is awakened at a regular rate set by

TEMP_PER[2:0].

The result of the temperature measurement can be read

from STEMP[15:0]. Typically, only eleven bits are signifi-

cant, the remaining high-order bits reflecting the sign of

the temperature relative to 0C.

Battery Monitor

The 71M654xT temperature measurement circuit can

also monitor the batteries at the VBAT and VBAT_RTC

pins. The battery to be tested (i.e., VBAT or VBAT_RTC

pin) is selected by TEMP_BSEL.

When TEMP_BAT is set, a battery measurement is

performed as part of each temperature measurement.

The value of the battery reading is stored in register

BSENSE[7:0]. The battery voltage can be calculated by

using the formula in the BATTERY MONITOR section of

the electrical characteristics table.

In MSN mode, a 100µA de-passivation load can be applied

to the selected battery (i.e., selected by the TEMP_BSEL

bit) by setting the BCURR bit. Battery impedance can

be measured by taking a battery measurement with and

without BCURR. Regardless of the BCURR bit setting,

the battery load is never applied in BRN, LCD, and SLP

modes.

Digital I/O

On reset or power-up, all DIO pins are DIO inputs until

they are configured as desired under MPU control.

DIO pins can be configured independently as an input or

output. The PB pin is a dedicated digital input and is not

part of the DIO system.

Some pins (DIO2 through DIO11 and PB) can be routed

to internal logic such as the interrupt controller or a timer

channel. This routing is independent of the direction of the

pin, so that outputs can be configured to cause an inter-

rupt or start a timer.

A total of 32 combined DIO pins is available for the

71M6545T/HT. These pins can be categorized as follows:

18 DIO pins:

• DIO4…DIO5 (2 pins)

• DIO9…DIO14 (6 pins)

• DIO19…DIO25 (7 pins)

• DIO28…DIO29 (2 pins)

• DIO55 (1 pin)

9 DIO pins shared with other functions:

• DIO0/WPULSE, DIO1/VPULSE (2 pins)

• DIO2/SDCK, DIO3/SDATA (2 pins)

• DIO6/XPULSE, DIO7/YPULSE (2 pins)

• DIO8/DI (1 pin)

• DIO26, DIO27 (2 pins)

9 dedicated pins are available:

• SPI interface pins: SPI_CSZ, SPI_DO, SPI_DI, SPI_

CKI (4 pins)

• ICE Inteface pins: E_RXTX, E_TCLK, E_RST (3 pins)

• Test Port pins: TMUX2OUT, TMUXOUT (2 pins)

EEPROM Interface

The 71M654xT provides hardware support for both two-

pin (I2C) and three-wire (MICROWIRE) EEPROMs.

Two-Pin EEPROM Interface

The two-pin serial interface is multiplexed onto the DIO2

(SDCK) and DIO3 (SDATA) pins. Configure the interface

for two-pin mode by setting DIO_EEX[1:0] = 01. The

MPU communicates with the interface through the SFR

registers EEDATA and EECTRL. To write a byte of data

to the EEPROM the MPU places the data in EEDATA and

then writes the Transmit code to EECTRL. This initiates

the transmit operation which is finished when the BUSY

bit falls. INT5 is also asserted when BUSY falls. The MPU

can then check the RX_ACK bit to see if the EEPROM

acknowledged the transmission.

A byte is read by writing the Receive command to

EECTRL and waiting for the BUSY bit to fall. Upon com-

pletion, the received data is in EEDATA. The serial trans-

mit and receive clock is 78kHz during each transmission,

and then holds in a high state until the next transmission.

The two-pin interface handles protocol details. The MPU

can command the interface to issue a start, a repeated

start and a stop condition, and it can manage the transmit-

ted ACK status as well.

Three-Wire EEPROM Interface

The three-wire interface supports standard MICROWIRE

(single data pin with clock and select pins) or a subset of

SPI (separate DI and DO pins with clock and select pins).

MICROWIRE is selected by setting DIO_EEX[1:0] = 10. In

this mode, EECTRL selects whether the interface is send-

ing or receiving, and eight bits of data are transferred in

each transaction. In this configuration, DIO2 is configured

for clock, and DIO3 is configured for data.

When separate DI/DO pins are selected (DIO_EEX[1:0]

= 11) the interface operates as a subset of SPI. Only SPI

modes 0 or 3 are supported. In this configuration, DIO3 is

DO and DIO8 is DI.

71M6545HT-IGTR/F Datasheet(PDF) 32 Page - Maxim Integrated Products

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