SH79F3283PSLASH032PR datasheet(47/144 Pages) SINOWEALTH

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SH79F3283

Mode3: Programmable Clock Output

A 50% duty cycle clock can be programmed to come out on P0.5. To configure the Timer2 as a clock generator, bit C/ T2

———

must

be cleared and bit T2OE must be set. Bit TR2 starts and stops the timer.

In this mode T2 will output a 50% duty cycle clock:

RCAP2L]

[RCAP2H,

65536

SYS

Frequency

Out

Clock

−

Timer2 overflow will not generate an interrupt, so it is possible to use Timer2 as a baud-rate generator and a clock output

simultaneously with the same frequency.

TR2

The Block Diagram of Programmable Clock output ( Mode 3 ) of Timer2

T2OE

TL2

TH2

RCAP2L

RCAP2H

EXEN2

EXF2

0:Switch Off

1:Switch On

T2EX

C/ T2

0:Switch Off

1:Switch On

Timer2 Interrupt

Request

0:Switch Off

1:Switch On

1/12

System

Clock

TCLKP2

1/2

Note:

(1) Both TF2 and EXF2 can cause timer2 interrupt request, and they have the same vector address.

(2) TF2 and EXF2 are set as 1 by hardware while event occurs. But they can also be set by software at any time. Only the

software and the hardware reset will be able to clear TF2 & EXF2 to 0.

(3) When EA = 1 & ET2 = 1, setting TF2 or EXF2 as 1 will cause a timer2 interrupt.

(4) While Timer2 is used as baud rate generator , writing TH2/TL2, writing RCAPH2/RCAPL2 will affect the accutacy of baud

rate, thus might make cause communication error.

SH79F3283P/032PR Datasheet(PDF) 47 Page - SINOWEALTH Electronic Ltd

SH79F3283P/032PR Datasheet(HTML) 47 Page - SINOWEALTH Electronic Ltd

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