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SH79F3283P/032PR Datasheet(PDF) 82 Page - SINOWEALTH Electronic Ltd |
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SH79F3283P/032PR Datasheet(HTML) 82 Page - SINOWEALTH Electronic Ltd |
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82 / 144 page  SH79F3283 82 8.3 12-bit PWM0 (Pulse Width Modulation) 8.3.1 Feature Three complementary output with dead time control Provided overflow and duty interrupt function on every PWM period Selectable output polarity Fault detect function provided to disable PWM output immediately Lock register provided to avoid PWM control register to be unexpected change The SH79F3283 has one 12-bit PWM module, which can provide the pulse width modulation waveform with the period and the duty being controlled individually by corresponding register. PWM timer can be turned to inactive state by the input of FLT pin automatically if EFLT is set PWM timer also provides 1 interrupts for PWM0. This makes it possible to change period or duty of next cycle in every PWM period. 8.3.2 PWM Module Enable Table 8.13 PWM Module Enable Register CFH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 PWMEN EPWM0 EFLT PWM01COE PWM01BOEPWM01AOE PWM0COE PWM0BOE PWM0AOE R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 0 0 Bit Number Bit Mnemonic Description 7 EPWM0 12 bit PWM0 output enable bit 0: disable PWM0, shared as I/O 1: enable PWM0 6 EFLT FLT pin configuration 0: general purpose I/O or SS ——— pin 1: PWM Fault Detect input pin 5-3 PWM01COE PWM01BOE PWM01AOE 12 bit PWM output PWM01x enable 0: PWM01x (x = A, B, C) output disable, shared as I/O 1: PWM01x output enable 2-0 PWM0COE PWM0BOE PWM0AOE 12 bit PWM output PWM0x enable 0: PWM0x (x = A, B, C) output disable, shared as I/O 1: PWM0x output enable PWM output will be disabled at the same time when the PWM Enable register is clear to 0. The main purpose of the FLT pin is to inactivate the PWM output signals and driver them into an inactive state. The action of the FLT is performed directly in hardware so that when a fault occurs, it can be managed quickly and the PWM output are put into an inactive state to save the power devices connected to the PWM. The FLT pin has no internal pull-high resistor. If EFLT is set to 0, it means the level on FLT pin has no effect on PWM timer. 8.3.3 PWM Timer Lock Register This register is used to control the change of PWM timer enable register, PWM control register and PWM period register and PWM duty register. Only when the data in this register is #55h, it is possible to change these register. Otherwise they cannot be changed. This register is to enhance the anti-noise ability of SH79F3283. Table 8.14 PWM Timer Lock Register E7H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 PWMLO PWMLO.7 PWMLO.6 PWMLO.5 PWMLO.4 PWMLO.3 PWMLO.2 PWMLO.1 PWMLO.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 0 0 0 0 0 0 0 Bit Number Bit Mnemonic Description 7-0 PWMLO[7:0] PWM lock register 55h: enable to change PWM related registers else: disable to change PWM related registers |
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