CS47L35 datasheet(108/300 Pages) CIRRUS

108 / 300 page

108

DS1085F3

CS47L35

4.6 Digital Audio Interface

Figure 4-34. Typical AIF Connections

In the general case, the digital audio interface uses four pins:

• TXDAT: data output

• RXDAT: data input

• BCLK: bit clock, for synchronization

• LRCLK: left/right data-alignment clock

In Master Mode, the clock signals BCLK and LRCLK are outputs from the CS47L35. In Slave Mode, these signals are

inputs, as shown in Section 4.6.1.

The following interface formats are supported on AIF1–AIF3:

• DSP Mode A.

• DSP Mode B

•I2S

• Left-justified

The left-justified and DSP-B formats are valid in Master Mode only (i.e., BCLK and LRCLK are outputs from the CS47L35).

These modes cannot be supported in Slave Mode.

The audio interface formats are described in Section 4.6.2. The bit order is MSB-first in each case; data words are encoded

in 2’s complement format. Mono PCM operation can be supported using the DSP modes. Refer to Table 3-16 through

Table 3-18 for signal timing information.

Audio Interface 1

Audio Interface 2

Audio Interface 3

HDMI

Device

Baseband

Processor

Wireless

Transceiver

SLIMbus interface

Applications

Processor

CS47L35

CS47L35 Datasheet(PDF) 108 Page - Cirrus Logic