Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

WM8770 Datasheet(PDF) 42 Page - Wolfson Microelectronics plc

Part # WM8770
Description  24-bit, 192kHz 8-Channel Codec with Volume Control
PDF  52 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8770 Datasheet(HTML) 42 Page - Wolfson Microelectronics plc

Back Button WM8770 Datasheet HTML 38Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 39Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 40Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 41Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 42Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 43Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 44Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 45Page - Wolfson Microelectronics plc WM8770 Datasheet HTML 46Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 42 / 52 page
background image
WM8770
Production Data
w
PD Rev 4.1 June 2005
42
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
3:0
DMUTE[3:0]
0000
DAC Channel Soft Mute Enables:
0: mute disabled
1: mute enabled
4
MUTEALL
0
DAC Channel Master Soft Mute. Mutes all DAC channels:
0: mute disabled
1: mute enabled
10100
Mute Control
5
RECEN
0
REC Output Enable
0 : REC output muted
1: REC output enabled
3:0
DEEMP[3:0]
0000
De-emphasis Mode Select:
0 : Normal Mode
1: De-emphasis Mode
10101
DAC Control
7:4
DZFM[3:0]
0000
Selects the ouput for ZFLG1 and ZFLG2 pins (see Table 9).
1: indicates 1024 consecutive zero input samples on the
channels selected
0: indicates at least one of selected channels has non
zero sample in last 1024 inputs
1:0
FMT[1:0]
10
Interface Format Select
00: right justified mode
01: left justified mode
10: I
2S mode
11: DSP mode
ADCLRC/DACLRC Polarity or DSP Early/Late mode select
2
LRP
0
Left Justified / Right Justified /
I
2S
0: Standard DACLRC Polarity
1: Inverted DACLRC Polarity
DSP Mode
0: Early DSP mode
1: Late DSP mode
3
BCP
0
BITCLK Polarity
0: Normal - DIN[3:0], DACLRC & ADCLRC sampled on
rising edge of BCLK; DOUT changes on falling edge of
BCLK.
1: Inverted - DIN[3:0], DACLRC & ADCLRC sampled on
falling edge of BCLK; DOUT changes on rising edge of
BCLK.
5:4
WL[1:0]
10
Input Word Length
00: 16-bit Mode
01: 20-bit Mode
10: 24-bit Mode
11: 32-bit Mode (not supported in right justified mode)
10110
Interface
Control
8
ADCHPD
0
ADC Highpass Filter Disable:
0: Highpass Filter enabled
1: Highpass Filter disabled



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com