PI3DPX1203 datasheet(5/41 Pages) DIODES

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PI3DPX1203

A product Line of

Diodes Incorporated

5 of 43

www.diodes.com

February 2021

PI3DPX1203

Document number DS40598 Rev 2-2

3.2 Pin Description

Pin Name

Pin #

Type Description

IN0P/N

4, 5

CML Inputs +/- for Channel A0 with internal 50Ω pull-up, and 200kΩ pull-up for power

down mode

IN1P/N

7, 8

CML Inputs +/- for Channel A1 with internal 50Ω pull-up, and 200kΩ pull-up for power

down mode

IN2P/N

10, 11

CML Inputs +/- for Channel A2 with internal 50Ω pull-up, and 200kΩ pull-up for power

down mode

IN3P/N

13, 14

CML Inputs +/- for Channel A3 with internal 50Ω pull-up, and 200kΩ pull-up for power

down mode

OUT0P/N

35, 34

CML Outputs +/- for Channel A0 with internal 50Ω pull-up, and 2kΩ pull-up for power

down mode

OUT1P/N

32, 31

CML Outputs +/- for Channel A1 with internal 50Ω pull-up, and 2kΩ pull-up for power

down mode

OUT2P/N

29, 28

CML Outputs +/- for Channel A2 with internal 50Ω pull-up, and 2kΩ pull-up for power

down mode

OUT3P/N

26, 25

CML Outputs +/- for Channel A3 with internal 50Ω pull-up, and 2kΩ pull-up for power

down mode

SDA

I/O

I2C Data

SCL

I/O

I2C Clock

PRSNT#

Cable Present Detect Input. This pin has internal 100kΩ pull-up.

When the pin is "1", the cable does not present and enter to the lower power mode.

When the pin is "0", the device is Active with normal operation.

ENI2C

I2C enable pin.

When the pin is "1", register access I2C Slave mode

When the pin is "0", pin-strapping control mode

SW[1:0]

1, 2

Swing Control 2 bits. Input with internal 100 kΩ pull-up. This pin control the output Volt-

age Swing Level in all channel when ENI2C is "0".

FG0

38, 37

Flat Gain Control 2 bits pins. Inputs with internal 100 kΩ pull-up. This pin control the

output flat gain level on all channels when ENI2C is "0".

FG1/I2C_RE-

SET#

I2C Reset pin. Active "0". All programmable registers reset to the default state. Inputs with

internal 100kΩ pull up.

EQ[3:0]/

AD[3:0]

42, 41, 40,

EQ setting pins. Inputs with internal 100 kΩ pull-up. This 4-bit pins control the amount of

Input Equalizer Boost in all channel, when ENI2C is "0".

I2C address control 4 bits with internal 100kΩ pull-up.

16, 17, 22,

No Connect

VDD

3, 6, 9, 12,

15, 24, 27,

30, 33, 36

PWR 3.3V Power Supply

GND

Center Pad GND Exposed Ground pad

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