NRF9160-SIBA-R datasheet(34/400 Pages) NORDIC

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Application core

I-code cache configuration register

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R/W

Field

Value ID

Value

Description

CACHEEN

Cache enable

Disabled

Disable cache. Invalidates all cache entries.

Enabled

Enable cache

CACHEPROFEN

Cache profiling enable

Disabled

Disable cache profiling

Enabled

Enable cache profiling

4.4.8.7 IHIT

Address offset: 0x548

I-code cache hit counter

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R/W

Field

Value ID

Value

Description

HITS

Number of cache hits

Write zero to clear

4.4.8.8 IMISS

Address offset: 0x54C

I-code cache miss counter

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R/W

Field

Value ID

Value

Description

MISSES

Number of cache misses

Write zero to clear

4.4.8.9 CONFIGNS

Address offset: 0x584

Note: This register is one hot

4418_1315 v2.0

NRF9160-SIBA-R Datasheet(PDF) 34 Page - Nordic Semiconductor

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