NRF9160-SICA-R7 datasheet(41/400 Pages) NORDIC

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Application core

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A

Reset 0xFFFFFFFF

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

R/W

Field

Value ID

Value

Description

ROSC4

Sample count for ring oscillator 4

4.6 UICR — User information configuration registers

The user information configuration registers (UICRs) are non-volatile memory (NVM) registers for

configuring user specific settings.

For information on writing UICR registers, see the NVMC — Non-volatile memory controller on page

29 and Memory on page 21 chapters.

4.6.1 Registers

Base address Peripheral

Instance

Secure mapping

DMA security

Description

Configuration

0x00FF8000

UICR

User information

configuration

Table 14: Instances

Offset

Security Description

APPROTECT

0x000

Access port protection

XOSC32M

0x014

Oscillator control

HFXOSRC

0x01C

HFXO clock source selection

HFXOCNT

0x020

HFXO startup counter

SECUREAPPROTECT

0x02C

Secure access port protection

ERASEPROTECT

0x030

Erase protection

OTP[n]

0x108

One time programmable memory

KEYSLOT.CONFIG[n].DEST

0x400

Destination address where content of the key value registers (KEYSLOT.KEYn.VALUE[0-3]) will

be pushed by KMU. Note that this address must match that of a peripherals APB mapped

write-only key registers, else the KMU can push this key value into an address range which

the CPU can potentially read.

KEYSLOT.CONFIG[n].PERM

0x404

Define permissions for the key slot. Bits 0-15 and 16-31 can only be written when equal to

0xFFFF.

KEYSLOT.KEY[n].VALUE[o]

0x800

Define bits [31+o*32:0+o*32] of value assigned to KMU key slot.

Table 15: Register overview

4.6.1.1 APPROTECT

Address offset: 0x000

Access port protection

4418_1315 v2.0

NRF9160-SICA-R7 Datasheet(PDF) 41 Page - Nordic Semiconductor

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