MPC8540 datasheet(201/1302 Pages) FREESCALE

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Functional Description

MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

Freescale Semiconductor

4-15

Note that the values latched on these signals during POR are accessible through the

memory-mapped PORBMSR (POR boot mode status register) described in Section 18.4.1.2,

“POR Boot Mode Status Register (PORBMSR).”

NOTE

If the MPC8540 is an agent on a particular interface, and the CPU is

not in holdoff mode (as described in Section 4.4.3.5, “CPU Boot

Configuration”) then the boot ROM should not be located on the

interface where the external host exists, because the MPC8540 is not

enabled to master reads onto that interface.

4.4.3.5

CPU Boot Configuration

The CPU boot configuration input, shown in Table 4-13, specifies the boot configuration mode. If

LA27 is sampled low at reset, the e500 core is prevented from fetching boot code until

configuration by an external master is complete. The external master frees the CPU to boot by

setting EEBPCR[CPU_EN] in the ECM CCB port configuration register (EEBPCR). See

Section 8.2.1.2, “ECM CCB Port Configuration Register (EEBPCR),” for more information.

Note that the values latched on these signals during POR are accessible through the

memory-mapped PORBMSR (POR boot mode status register) described in Section 18.4.1.2,

“POR Boot Mode Status Register (PORBMSR).”

Table 4-12. Host/Agent Configuration

Functional Signals

Reset Configuration

Name

Value

(Binary)

Meaning

LWE[2:3]

Default (11)

cfg_host_agt[0:1]

MPC8540 acts as an agent of both a PCI/PCI-X and

a RapidIO device.

MPC8540 acts as an agent of a RapidIO host.

MPC8540 acts as an agent of a PCI/PCI-X host.

MPC8540 acts as the host processor (default).

Table 4-13. CPU Boot Configuration

Functiona

Signal

Reset Configuration

Name

Value

(Binary)

Meaning

LA27

Default (1)

cfg_cpu_boot

CPU boot holdoff mode. The e500 core is prevented from booting until

configured by an external master.

The e500 core is allowed to boot without waiting for configuration by

an external master (default).

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