STM32W108HB datasheet(245/278 Pages) STMICROELECTRONICS

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ

Electrical characteristics

Doc ID 16252 Rev 14

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14.4

SPI interface characteristics

Unless otherwise specified, the parameters given in Table 55 for the SPI are derived from

tests performed under ambient temperature and VDD supply voltage conditions summarized

in Table 48: General operating conditions.

SPI clock frequency

Master mode

Slave mode

Duty cycle of SPI clock

frequency

Slave mode

SPI clock rise and fall

time

Capacitive load: C = 15 pF

NSS setup time

Slave mode

NSS hold time

Slave mode

SCK high and low time

Master mode

Data input setup time

Master mode

Slave mode

Data input hold time

Master mode

Slave mode

Data output access time Slave mode, fPCLK = 12 MHz

Data output disable time Slave mode

Data output valid time

Slave mode (after enable edge)

Master mode (after enable edge)

Data output hold time

Slave mode (after enable edge)

Master mode (after enable edge)

Table 55.

SPI characteristics

Symbol

Parameter

Conditions

Min

Max(1)

Based on characterization, not tested in production.

Unit

fSCK

1/tc(SCK)

-12

MHz

-5

Duty(SCK)

tr(SCK)

tf(SCK)

tsu(NSS)

2tPCLK

th(NSS)

2tPCLK

tw(SCKH)

tw(SCKL)

TCSCK/

2-2

TCSCK/

2+2

tsu(MI)

tsu(SI)

th(MI)

th(SI)

0.25

ta(SO)

(2)

Min time is for the minimum time to drive the output and max time is for the maximum time to validate the

data.

02tPCLK

tdis(SO)

(3)

Min time is for the minimum time to invalidate the output and max time is for the maximum time to put the

data in Hi-Z.

Characterization values are related to STM32W108CC.

tv(SO)

(1)

tv(MO)

(1)

14.25

th(SO)

(1)

th(MO)

(1)

15.6

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