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AM625 Datasheet(PDF) 69 Page - Texas Instruments

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Part # AM625
Description  AM62x Sitara™ Processors
PDF  255 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AM625 Datasheet(HTML) 69 Page - Texas Instruments

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Table 6-25. GPMC0 Signal Descriptions (continued)
SIGNAL NAME [1]
PIN TYPE [2]
DESCRIPTION [3]
ALW PIN [4]
AMC PIN [4]
GPMC0_A21
OZ
GPMC address 21 Output in A/D non-
multiplexed mode and unused in A/D
multiplexed mode
V25
P17
GPMC0_A22
OZ
GPMC address 22 Output in A/D non-
multiplexed mode and unused in A/D
multiplexed mode
K25
J20
GPMC0_AD0
IO
GPMC Data 0 Input/Output in A/D non-
multiplexed mode and additionally Address 1
Output in A/D multiplexed mode
M25
K19
GPMC0_AD1
IO
GPMC Data 1 Input/Output in A/D non-
multiplexed mode and additionally Address 2
Output in A/D multiplexed mode
N23
L19
GPMC0_AD2
IO
GPMC Data 2 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
N24
L20
GPMC0_AD3
IO
GPMC Data 3 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
N25
L21
GPMC0_AD4
IO
GPMC Data 4 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
P24
M21
GPMC0_AD5
IO
GPMC Data 5 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
P22
L17
GPMC0_AD6
IO
GPMC Data 6 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
P21
L18
GPMC0_AD7
IO
GPMC Data 7 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
R23
M20
GPMC0_AD8
IO
GPMC Data 8 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
R24
N20
GPMC0_AD9
IO
GPMC Data 9 Input/Output in A/D non-
multiplexed mode and additionally Address 3
Output in A/D multiplexed mode
R25
N21
GPMC0_AD10
IO
GPMC Data 10 Input/Output in A/D non-
multiplexed mode and additionally Address 11
Output in A/D multiplexed mode
T25
M17
GPMC0_AD11
IO
GPMC Data 11 Input/Output in A/D non-
multiplexed mode and additionally Address 12
Output in A/D multiplexed mode
R21
N18
GPMC0_AD12
IO
GPMC Data 12 Input/Output in A/D non-
multiplexed mode and additionally Address 13
Output in A/D multiplexed mode
T22
N17
GPMC0_AD13
IO
GPMC Data 13 Input/Output in A/D non-
multiplexed mode and additionally Address 14
Output in A/D multiplexed mode
T24
N19
GPMC0_AD14
IO
GPMC Data 14 Input/Output in A/D non-
multiplexed mode and additionally Address 15
Output in A/D multiplexed mode
U25
P19
GPMC0_AD15
IO
GPMC Data 15 Input/Output in A/D non-
multiplexed mode and additionally Address 16
Output in A/D multiplexed mode
U24
P20
GPMC0_BE0n_CLE
O
GPMC Lower-Byte Enable (active low) or
Command Latch Enable
M24
K17
GPMC0_BE1n
O
GPMC Upper-Byte Enable (active low)
N20
K18
www.ti.com
AM625, AM623
SPRSP58A – JUNE 2022 – REVISED NOVEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: AM625 AM623



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