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AM625 Datasheet(PDF) 3 Page - Texas Instruments |
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AM625 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 255 page  Media and Data Storage: • 3x Secure Digital® (SD®) (4b+4b+8b) interface – 1x 8-bit eMMC interface up to HS200 speed – 2x 4-bit SD/SDIO interface up to UHS-I – Compliant with eMMC 5.1, SD 3.0 and SDIO Version 3.0 • 1× General-Purpose Memory Controller (GPMC) up to 133 MHz – Flexible 8- and 16-Bit Asynchronous Memory Interface With up to four Chip (22-bit address) Selects (NAND, NOR, Muxed-NOR, and SRAM) – Uses BCH Code to Support 4-, 8-, or 16-Bit ECC – Uses Hamming Code to Support 1-Bit ECC – Error Locator Module (ELM) • Used With the GPMC to Locate Addresses of Data Errors From Syndrome Polynomials Generated Using a BCH Algorithm • Supports 4-, 8-, and 16-Bit Per 512-Byte Block Error Location Based on BCH Algorithms • OSPI/QSPI with DDR / SDR support – Support for Serial NAND and Serial NOR flash devices – 4GBytes memory address support – XIP mode with optional on-the-fly encryption Power Management: • Low power modes supported by Device/Power Manager – Partial IO support for CAN/GPIO/UART wakeup – DeepSleep – MCU Only – Standby – Dynamic frequency scaling for Cortex-A53 Optimal Power Management Solution: • Recommended TPS65219 Power Management ICs (PMIC) – Companion PMIC specially designed to meet device power supply requirements – Flexible mapping and factory programmed configurations to support different use cases Boot Options: • UART • I2C EEPROM • OSPI/QSPI Flash • GPMC NOR/NAND Flash • Serial NAND Flash • SD Card • eMMC • USB (host) boot from Mass Storage device • USB (device) boot from external host (DFU mode) • Ethernet Technology / Package: • 16-nm technology • 13 mm x 13 mm, 0.5-mm pitch, 425-pin FCCSP BGA (ALW) • 17.2 mm x 17.2 mm, 0.8-mm pitch, 441-pin FCBGA (AMC) [Advance Information] www.ti.com AM625, AM623 SPRSP58A – JUNE 2022 – REVISED NOVEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: AM625 AM623 |
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