LTM8024 datasheet(19/28 Pages) AD

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LTM8080

Rev. 0

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large output capacitance of the load. However, when a

clock is applied to the SYNC pin, the frequency foldback

is disabled.

Synchronization

To select low ripple Burst Mode operation, tie the SYNC

pin below 0.4V (this can be ground or a logic low out-

put). Then, to synchronize the LTM8080 oscillator to an

external frequency, connect a square wave (with about

20% to 80% duty cycle) to the SYNC pin. The square

wave amplitude should have valleys below 0.4V and peaks

above 1.5V.

The LTM8080 may be synchronized over a 200kHz to

2.2MHz range. The LTM8080 will not enter Burst Mode

operation at light output loads while synchronized to an

external clock but instead will pulse-skip to maintain

regulation. The RT resistor should be chosen to set the

switching frequency equal to or below the lowest syn-

chronization input. For example, if the synchronization

signal is 500kHz and higher, the RT should be selected

for 500kHz or lower frequency.

The LTM8080 features spread-spectrum operation to

further reduce EMI/EMC emissions. To enable spread

spectrum operation, apply between 2.9V and 4.2V to the

SYNC pin. In this mode, triangular frequency modula-

tion is used to vary the switching frequency between the

value programmed by RT to about 20% higher than that

value. The modulation frequency is about 3kHz. When the

spread-spectrum operation is selected, the Burst-Mode

operation is disabled, and the part may run in pulse-skip-

ping mode.

PSRR

While the high-level integration of LTM8080 solves most

headache routing to achieve ultrahigh PSRR, ADI still rec-

ommends using the LTM8080 demo board layout and the

input/output capacitances shown in Table 1 for achieving

the best possible PSRR performance.

Output Noise

LTM8080 back-end linear regulator uses a 100µA current

reference to define output voltage. This current reference

operates with a typical noise current level of 20pA/√Hz

(6nARMS over a 10Hz to 100kHz bandwidth). The resultant

voltage noise equals the current noise multiplied by the

resistor value, which in turn is RMS summed with the

error amplifier’s noise and the resistor’s noise of √4kTR,

where by k = Boltzmann’s constant 1.38 • 10–23J/K and

T is the absolute temperature.

Conventional linear regulators use a resistor divider to set

the output voltage. This method gains the reference noise

and injects that noise onto the output. The LTM8080 uses

the ADI patented unity-gain follower architecture to set the

output voltage. This unique architecture does not gain any

noise present at the SET pin, thereby minimizing noise

injected into the output. Therefore, if a capacitor bypasses

the SET pin resistor, the output noise is independent of the

programmed output voltage. The resultant output noise is

set just by the error amplifier’s noise—typically 2nV/√Hz

from 10kHz to 1MHz and 0.8µVRMS in a 10Hz to 100kHz

bandwidth using a 4.7uF SET pin capacitor. Therefore,

paralleling multiple LTM8080 outputs will reduce noise

by √N for N outputs.

See the Typical Performance Characteristics section for

noise spectral density, and RMS-integrated noise over

various load current and SET pin capacitances.

Set PIN (Bypass) Capacitance: Noise, PSRR, Transient

Response, and VOUT Soft-Start

In addition to reducing output noise, using a SET pin

bypass capacitor improves PSRR and transient perfor-

mance. Note that any bypass capacitor leakage deterio-

rates the LTM8080 output DC regulation. Capacitor leak-

age of even 100nA is a 0.1% DC error. Therefore, ADI

recommends using a good quality low leakage ceramic

capacitor.

Using a SET pin bypass capacitor also soft-starts the

output and limits inrush current. The RC time constant,

formed by the SET pin resistor and capacitor, controls

soft-start time. Ramp-up rate from 0 to 90% of nominal

VOUT shown in Equation 2.

tSS ≈ 2.3 • RSET • CSET (Fast Start-Up Disabled) (2)

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