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AX88780 Datasheet(PDF) 25 Page - ASIX Electronics Corporation

Part # AX88780
Description  High-Performance Non-PCI Single-Chip 32-bit 10/100M Fast Ethernet Controller
PDF  49 Pages
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Manufacturer  ASIX [ASIX Electronics Corporation]
Direct Link  http://www.asix.com.tw
Logo ASIX - ASIX Electronics Corporation

AX88780 Datasheet(HTML) 25 Page - ASIX Electronics Corporation

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AX88780
4.20 RXBTHD0--RX buffer Threshold0 Register
Offset Address= FC58h
Default = 32’h0000_0300
Field
Name
Type
Default
Description
31:11
-
R
All 0’s
Reserved
10:0
RXLOWB
R/W
11’h300
RX Low-Bound Threshold for Pause Operation
This field defines the lower-bound threshold of RX buffer for pause
operation. If the flow control is enabled, MAC will refer this field for low
bound. The unit is a 16-byte. Diver can properly set this field for
performance issue. AX88780 is built 32KB buffer for rx operation, so the
combination of RXBTHD0 and RXBTHD1 will affect the performance of
receive.
4.21 RXBTHD1--RX Buffer Threshold1 Register
Offset Address= FC5Ch
Default = 32’h0000_0600
Field
Name
Type
Default
Description
31:11
-
R
All 0’s
Reserved
10:0
RXHIGHB
R/W
11’h600
RX Upper-Bound Threshold for Pause Operation
This field defines the upper-bound threshold of rx buffer for pause
operation. If the flow control is enabled, MAC will refer this field for
upper bound. The unit is a 16-byte. Diver can properly set this field for
performance issue.
4.22 RXFULTHD--RX Buffer Full Threshold Register
Offset Address= FC60h
Default = 32’h0000_0100
Field
Name
Type
Default
Description
31:11
-
R
All 0’s
Reserved
10:0
RXFULB
R/W
11’h100
RX Full Threshold
This field defines the least capacity of RX buffer. AX88780 will cause RX
full if it remains capacity under this value. The unit is 16-byte.
4.23 MISC—Misc. Control Register
Offset Address= FC68h
Default = 32’h0000_0003
Field
Name
Type
Default
Description
31:6
-
R
All 0’s
Reserved
5
WAKE_LNK
R/W
0
WAKE-UP by Link-Up Function
If this bit is enabled, MAC will drive wakeup pin whenever there is link-up
occurrence. The polarity of wakeup pin is according to bit0 of CMD
register.
1= enable
0= disable
4
WAKE_MAG
R/W
0
WAKE-UP by Magic Packet
If this bit is enabled, MAC will drive wakeup pin whenever there is magic
packet detected by hardware. The polarity of wakeup pin is according to
bit0 of CMD register.
1= enable wake-up by magic packet
25
ASIX ELECTRONICS CORPORATION



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