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STM32U535NET6QTR Datasheet(PDF) 46 Page - STMicroelectronics |
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STM32U535NET6QTR Datasheet(HTML) 46 Page - STMicroelectronics |
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46 / 278 page ![]() Functional overview STM32U535xx 46/278 DS14217 Rev 1 interrupt is generated if enabled. LSE failure can also be detected and generates an interrupt. • Clock-out capability: – MCO (microcontroller clock output): it outputs one of the internal clocks for external use by the application. – LSCO (low-speed clock output): it outputs LSI or LSE in all low-power modes (except VBAT mode). Several prescalers allow AHB and APB frequencies configuration. The maximum frequency of the AHB and the APB clock domains is 160 MHz. |
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