STM32U535NET6QTR datasheet(43/278 Pages) STMICROELECTRONICS

43 / 278 page

DS14217 Rev 1

43/278

STM32U535xx

Functional overview

DCMI (digital camera

interface)

PSSI (paral. synch.

slave interface)

CORDIC coprocessor

FMAC (filter

mathematical

accelerator)

TSC (touch sensing

controller)

RNG (true random

number generator)

HASH accelerator

CRC calculation unit

GPIOs

(18)

pins

(18)

pins

(19)

pins

1. Y = yes (enabled). O = optional (disabled by default, can be enabled by software). - = not available.

Gray cells highlight the wake-up capability in each mode.

2. The flash memory can be configured in power-down mode. By default, it is not in power-down mode.

3. The SRAMs can be powered on or off independently.

4. The SRAM clock can be gated on or off independently.

5. Sub-blocks or full SRAM1, full SRAM2 and SRAM4 can be powered-off to save power consumption. SRAM1, SRAM2, and

SRAM4 can be accessed by GPDMA1 in Stop 0 and Stop 1 modes. SRAM4 can be accessed by LPDMA1 in Stop 0,

Stop 1 and Stop 2 modes.

6. ECC error interrupt or NMI wake-up from Stop mode.

7. 8-Kbyte, 56-Kbyte or full SRAM2 content can be preserved.

8. GPDMA transfers are functional and autonomous in Stop mode, and generates a wake-up interrupt on transfer events.

9. LPDMA transfers are functional and autonomous in Stop mode, and generates a wake-up interrupt on transfer events.

10. Some peripherals with autonomous mode and wake-up from Stop capability can request HSI16, MSIS or MSIK to be

enabled. In this case, the oscillator is woken up by the peripheral, and is automatically put off when no peripheral needs it.

11. USB is functional in voltage scaling range 1, 2 and 3.

12. USART and LPUART reception and transmission are functional and autonomous in Stop mode in asynchronous and

in SPI master modes, and generate a wake-up interrupt on transfer events.

13. I2C reception and transmission are functional and autonomous in Stop mode, and generate a wake-up interrupt

on transfer events.

14. SPI reception and transmission are functional and autonomous in Stop mode, and generate a wake-up interrupt

on transfer events.

15. A/D conversion is functional and autonomous in Stop mode, and generates a wake-up interrupt on conversion events.

16. LPTIM is functional and autonomous in Stop mode, and generates a wake-up interrupt on events.

17. MDF and ADF are functional and autonomous in Stop mode, and generate a wake-up interrupt on events.

18. I/Os can be configured with internal pull-up, pull-down or floating in Stop 3 and Standby modes.

Table 10. Functionalities depending on the working mode(1) (continued)

Peripheral

Run

Sleep

Stop 0/1

Stop 2

Stop 3

Standby Shutdown

VBAT

STM32U535NET6QTR Datasheet(PDF) 43 Page - STMicroelectronics

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