84329B DATA SHEET

700MHZ, LOW JITTER, CRYSTAL-TO-3.3V LVPECL

FREQUENCY SYNTHESIZER

9

REVISION B 07/29/14

Overdriving the XTAL Interface

The XTAL_IN input can be overdriven by an LVCMOS driver or by one

side of a differential driver through an AC coupling capacitor. The

XTAL_OUT pin can be left floating. The amplitude of the input signal

should be between 500mV and 1.8V and the slew rate should not be

less than 0.2V/ns. For 3.3V LVCMOS inputs, the amplitude must be

reduced from full swing to at least half the swing in order to prevent

signal interference with the power rail and to reduce internal noise.

Figure 4A shows an example of the interface diagram for a high

speed 3.3V LVCMOS driver. This configuration requires that the sum

of the output impedance of the driver (Ro) and the series resistance

(Rs) equals the transmission line impedance. In addition, matched

termination at the crystal input will attenuate the signal in half. This

can be done in one of two ways. First, R1 and R2 in parallel should

equal the transmission line impedance. For most 50

 applications,

R1 and R2 can be 100

. This can also be accomplished by removing

R1 and changing R2 to 50

. The values of the resistors can be

increased to reduce the loading for a slower and weaker LVCMOS

driver. Figure 4B shows an example of the interface diagram for an

LVPECL driver. This is a standard LVPECL termination with one side

of the driver feeding the XTAL_IN input. It is recommended that all

components in the schematics be placed in the layout. Though some

components might not be used, they can be utilized for debugging

purposes. The datasheet specifications are characterized and

guaranteed by using a quartz crystal as the input.

Figure 4A. General Diagram for LVCMOS Driver to XTAL Input Interface

Figure 4B. General Diagram for LVPECL Driver to XTAL Input Interface