IDTTM

Programmable Timing Control HubTM for Intel Systems

1408A—01/25/10

ICS9E4101

Programmable Timing Control HubTM for Intel Systems

4

General Description

Block Diagram

Power Groups

ICS9E4101 follows Intel CK410 Yellow Cover specification. This clock synthesizer provides a single chip solution for next

generation P4 Intel processors and Intel chipsets. ICS9E4101 is driven with a 14.318MHz crystal. It generates CPU outputs

up to 400MHz. It also provides a tight ppm accuracy output for Serial ATA and PCI-Express support.

I REF

PLL2

Frequency

Dividers

Programmable

Spread

PLL1

Programmable

Frequency

Dividers

STOP

Logic

48MHz, USB

X1

X2

XTAL

SDATA

SCLK

Vtt_PWRGD#/PD

FS_A

FS_B

FS_C

ITP_EN

TEST_MODE

TEST_SEL

Control

Logic

REFOUT

CPUCLKT (2:0)

CPUCLKC (2:0)

SRCCLKT (7:1)

SRCCLKC (7:1)

PCICLK (5:0)

PCICLKF (2:0)

96MHz_DOTT_0

96MHz_DOTC_0

VDD

GND

48

51

Xtal, Ref

1,7

2,6

PCICLK outputs

21,28,34

29

SRCCLK outputs

37

38

Master clock, CPU Analog

11

13

DOT, USB, PLL_48

42

45

CPUCLK clocks

Description

Pin Number