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74HC4024 Datasheet(PDF) 8 Page - Nexperia B.V. All rights reserved |
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74HC4024 Datasheet(HTML) 8 Page - Nexperia B.V. All rights reserved |
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8 / 13 page ![]() Nexperia 74HC4024 7-stage binary ripple counter Symbol Parameter Conditions Min Typ Max Unit Tamb = -40 °C to +125 °C CP to Q0; see Fig. 6 [1] VCC = 2.0 V - - 265 ns VCC = 4.5 V - - 53 ns VCC = 6.0 V - - 45 ns Qn to Qn+1; see Fig. 6 [1] VCC = 2.0 V - - 120 ns VCC = 4.5 V - - 24 ns tpd propagation delay VCC = 6.0 V - - 20 ns MR to Q0; see Fig. 6 VCC = 2.0 V - - 300 ns VCC = 4.5 V - - 60 ns tPHL HIGH to LOW propagation delay VCC = 6.0 V - - 51 ns see Fig. 6 [2] VCC = 2.0 V - - 110 ns VCC = 4.5 V - - 22 ns tt transition time VCC = 6.0 V - - 19 ns CP HIGH or LOW; see Fig. 6 VCC = 2.0 V 120 - - ns VCC = 4.5 V 24 - - ns VCC = 6.0 V 20 - - ns MR HIGH; see Fig. 6 VCC = 2.0 V 120 - - ns VCC = 4.5 V 24 - - ns tW pulse width VCC = 6.0 V 20 - - ns MR to CP; see Fig. 6 VCC = 2.0 V 75 - - ns VCC = 4.5 V 15 - - ns trec recovery time VCC = 6.0 V 13 - - ns CP; see Fig. 6 VCC = 2.0 V 4.0 - - MHz VCC = 4.5 V 20 - - MHz fmax maximum frequency VCC = 6.0 V 24 - - MHz [1] tpd is the same as tPLH and tPHL. [2] tt is the same as tTHL and tTLH. [3] CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD x VCC2 x fi x N + ∑(CL x VCC2 x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; ∑(CL x VCC2 x fo) = sum of outputs. 74HC4024 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2018. All rights reserved Product data sheet Rev. 10 — 23 November 2018 8 / 13 |
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