UPD750004 datasheet(49/86 Pages) RENESAS

49 / 86 page

µPD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)

Data Sheet U10738EJ3V2DS

Group

Branch

Subrou-

tine stack

control

Mne-

monic

BRANote 3

BRCB

CALLANote 3

Operand

PCDE

PCXA

BCDE

BCXA

!addr1

!caddr

!addr1

Bytes

Machin-

ing

cycle

Skip

condition

Address-

ing area

*11

Operation

•

µPD750004

PC11-0

← PC11-8 + DE

•

µPD750006, 750008

PC12-0

← PC12-8 + DE

•

µPD750004

PC11-0

← PC11-8 + XA

•

µPD750006, 750008

PC12-0

← PC12-8 + XA

•

µPD750004

PC11-0

← BCDENote 1

•

µPD750006, 750008

PC12-0

← BCDENote 2

•

µPD750004

PC11-0

← BCXANote 1

•

µPD750006, 750008

PC12-0

← BCXANote 2

•

µPD750004

PC11-0

← addr1

•

µPD750006, 750008

PC12-0

← addr1

•

µPD750004

PC11-0

← caddr11-0

•

µPD750006, 750008

PC12-0

← PC12 + caddr11-0

•

µPD750004

(SP - 2)

← ×, ×, MBE, RBE

(SP - 6) (SP - 3) (SP - 4)

← PC11-0

(SP - 5)

← 0, 0, 0, 0

PC11-0

← addr1, SP ← SP - 6

•

µPD750006, 750008

(SP - 2)

← ×, ×, MBE, RBE

(SP - 6) (SP - 3) (SP - 4)

← PC11-0

(SP - 5)

← 0, 0, 0, PC12

PC12-0

← addr1, SP ← SP - 6

Notes 1. Set register B to 0.

2. Only the LSB is valid in register B.

3. The shaded portion is supported in Mk

ΙΙ mode only. The other portions are supported in Mk Ι mode only.

UPD750004 Datasheet(PDF) 49 Page - Renesas Technology Corp

UPD750004 Datasheet(HTML) 49 Page - Renesas Technology Corp

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