UPD750004 datasheet(21/86 Pages) RENESAS

21 / 86 page

µPD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)

Data Sheet U10738EJ3V2DS

Fig. 5-3

Program Memory Map (in

µPD750008)

Note Can be used only in the Mk

ΙΙ mode.

Remark In addition to the above, the BR PCDE and BR PCXA instructions can cause a branch to an address with

only the 8 low-order bits of the PC changed.

0000H

Address

0002H MBE RBE

INTBT/INT4

(high-order 5 bits)

start address

0004H MBE RBE

INT0

(high-order 5 bits)

start address

0006H MBE RBE

INT1

(high-order 5 bits)

start address

0008H MBE RBE

INTCSI

(high-order 5 bits)

start address

000AH MBE RBE

INTT0

(high-order 5 bits)

start address

0020H

007FH

0080H

07FFH

0800H

MBE RBE

Internal reset start address

(high-order 5 bits)

0FFFH

1000H

1FFFH

GETI instruction reference table

000CH MBE RBE

INTT1

(high-order 5 bits)

start address

(low-order 8 bits)

CALLF

!faddr

instruction

entry

address

BRCB !caddr

instruction

branch

address

Branch address

of BR BCXA, BR

BCDE, BR !addr,

BRA !addr1 or

CALLA !addr1Note

instruction

CALL !addr

instruction

subroutine entry

address

BR $addr

instruction relative

branch address

-15 to -1,

+2 to +16

Branch destination

address and

subroutine entry

address when GETI

instruction is executed

BRCB !caddr

instruction

branch

address

765

Internal reset start address

INTBT/INT4

INT0

INT1

INTCSI

INTT0

INTT1

start address

UPD750004 Datasheet(PDF) 21 Page - Renesas Technology Corp

UPD750004 Datasheet(HTML) 21 Page - Renesas Technology Corp

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