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UPD780949 Datasheet(PDF) 49 Page - Renesas Technology Corp |
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UPD780949 Datasheet(HTML) 49 Page - Renesas Technology Corp |
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49 / 69 page ![]() 49 µPD780949(A) DC Characteristics (TA = -40 to +85° C, VDD = 4.0 to 5.5 V) Mask ROM Version Note: The AVDD/AVREF current, port current (including a current flowing in the on-chip pull-up resistor) and the LCD split resistors are not included. Remarks: 1. fX: Main system clock oscillator frequency. 2. fXT: Subsystem clock oscillator frequency. Table 12-6: DC Characteristics Mask ROM Version DC Characteristics (TA = -10 to +85° C, VDD = 4.0 to 5.5 V) LCD C/D Static Method Note: The voltage deviation is the difference from the output voltage corresponding to the ideal value of the segment and common outputs (VLCDN; n = 0, 1, 2). Table 12-7: DC Characteristics Static Method Parameter Symbol Conditions MIN TYP MAX Unit IDD1 8.0 MHz crystal oscillation operating mode (PCC = 00H) 9.5 tbd mA IDD2 8.0 MHz crystal oscillation HALT mode 1.2 tbd mA IDD3 RC oscillation operating mode (fxT = 40 kHz) 180 tbd µA IDD4 RC oscillation HALT mode (fxT = 40 kHz) 60 tbd µA Power supply Note current IDD5 CL1 = VDD STOP mode 1 tbd µA Parameter Symbol Test Conditions MIN TYP MAX. Unit LCD drive voltage VLCD 3.0 VDD V LCD split resistor RLCD 515 45 k Ω LCD output voltage deviation Note (common) VODC IO = ± 5 µA 0 ±0.2 LCD output voltage deviation Note (segment) VODS IO = ± 1 µA 3.0 V ≤ VLCD ≤ VDD VLCD0 = VLCD 0±0.2 V |
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