TAS5504_06 datasheet(20/96 Pages) TI

20 / 96 page

Introduction

SLES123 − October 2004

TAS5504

7 Biquads

in Series

Bass and

Treble

Loudness

DRC

Input Mixer

1 Other

Channel Output

From 7 Available

32-Bit

Trunc

PWM

Proc

Volume

A_to_ipmix

B_to_ipmix

SDIN1

C_to_ipmix

D_to_ipmix

SDIN2

E_to_ipmix

F_to_ipmix

SDIN3

G_to_ipmix

H_to_ipmix

SDIN4

Max

Volume

Left

Right

Channel

Volume

Master

Volume

Bass and Treble

Bypass

Bass and Treble

In-Line

Pre-

Volume

Post-

Volume

DRC

In-Line

DRC

Bypass

Output

Gain

Output Mixer Sums

Any Two Channels

PWM

Output

Figure 1−4. TAS5504 Detailed Channel Processing

1.4.2 I2C Coefficient Number Formats

The architecture of the TAS5504 is contained in ROM resources within the TAS5504 and cannot be altered.

However, mixer gain, level offset, and filter tap coefficients, which can be entered via the I2C bus interface,

provide a user with the flexibility to set the TAS5504 to a configuration that achieves the system level goals.

The firmware is executed in a 48-bit signed fixed-point arithmetic machine. The most significant bit of the 48-bit

data path is a sign bit, and the 47 lower bits are data bits. Mixer gain operations are implemented by multiplying

a 48-bit signed data value by a 28-bit signed gain coefficient. The 76-bit signed output product is then truncated

to a signed 48-bit number. Level offset operations are implemented by adding a 48-bit signed offset coefficient

to a 48-bit signed data value. In most cases, if the addition results in overflowing the 48-bit signed number

format, saturation logic is used. This means that if the summation results in a positive number that is greater

than 0x7FFF_FFFF_FFFF (the spaces are used to ease the reading of the hexadecimal number), the number

is set to 0x7FFF_FFFF_FFFF. If the summation results in a negative number that is less than

0x8000_0000_0000 0000, the number is set to 0x8000_0000_0000 0000.

1.4.2.1

28-Bit 5.23 Number Format

All mixer gain coefficients are 28-bit coefficients using a 5.23 number format. Numbers formatted as 5.23

numbers means that there are 5 bits to the left of the decimal point and 23 bits to the right of the decimal point.

This is shown in the Figure 1−5.

2−23 Bit

S_xxxx.xxxx_xxxx_xxxx_xxxx_xxx

2−4 Bit

2−1 Bit

20 Bit

Sign Bit

23 Bit

Figure 1−5. 5.23 Format

TAS5504 Datasheet(PDF) 20 Page - Texas Instruments

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