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WM8593 Datasheet(PDF) 66 Page - Wolfson Microelectronics plc

Part # WM8593
Description  24-bit 192kHz 2Vrms Multi-Channel CODEC
PDF  98 Pages
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Manufacturer  WOLFSON [Wolfson Microelectronics plc]
Direct Link  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8593 Datasheet(HTML) 66 Page - Wolfson Microelectronics plc

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WM8593
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PP Rev 1.0 January 2007
66
R12 (0Ch) – Device Enable Register (ENABLE)
Bit #
15
14
13
12
11
10
9
8
Read
0
0
0
0
0
0
0
0
Write
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
Default
0
0
0
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Read
0
0
0
0
0
0
0
Write
N/A
N/A
N/A
N/A
N/A
N/A
N/A
GLOBAL_EN
Default
0
0
0
0
0
0
0
0
N/A = Not Applicable (no function implemented)
Function
Description
GLOBAL_EN
Device Global Enable
0 = ADC, DAC and PGA ramp control circuitry disabled
1 = ADC, DAC and PGA ramp control circuitry enabled
Figure 36 R12 – Device Enable Register
R13 (0Dh) – ADC Control Register 1 (ADC_CTRL1)
Bit #
15
14
13
12
11
10
9
8
Read
0
0
Write
N/A
N/A
ADC_ZCEN
ADC_HPD
ADC_DATA_SEL[1:0]
ADCL_INV
ADCR_INV
Default
0
0
1
0
0
0
0
0
Bit #
7
6
5
4
3
2
1
0
Read
Write
ADC_
LRSWAP
ADC_EN
ADC_LRP
ADC_BCP
ADC_WL[1:0]
ADC_FMT[1:0]
Default
0
0
0
0
1
0
1
0
N/A = Not Applicable (no function implemented)
Function
Description
ADC_FMT[1:0]
ADC Audio Interface Format
00 = Right Justified
01 = Left Justified
10 = I
2S
11 = DSP
ADC_WL[1:0]
ADC Audio Interface Word Length
00 = 16-bit
01 = 20-bit
10 = 24-bit
11 = 32-bit (not available in Right Justified mode)
ADC_BCP
ADC BCLK Polarity
0 = ADCBCLK not inverted - data latched on rising edge of BCLK
1 = ADCBCLK inverted - data latched on falling edge of BCLK
ADC_LRP
ADC LRCLK Polarity
0 = ADCLRCLK not inverted
1 = ADCLRCLK inverted
ADC_EN
ADC Enable
0 = ADC disabled
1 = ADC enabled
ADC_LRSWAP
ADC Left/Right Swap
0 = Normal
1 = Swap left channel data into right channel and vice-versa



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