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AT87C5103-ICSIL Datasheet(PDF) 14 Page - ATMEL Corporation |
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AT87C5103-ICSIL Datasheet(HTML) 14 Page - ATMEL Corporation |
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14 / 64 page ![]() 14 AT8xC5103 4134C–8051–09/04 Input Only Configuration The input only configuration is a pure input with neither pull-up nor pull-down. The input only configuration is shown in Figure 6. Figure 6. Input Only Ports Description Ports P1 and P3 The inputs of each I/O port of the AT8xC5103 are TTL level Schmitt triggers with hysteresis. Registers Table 4. P1M1 Register P1M1 Address (D4h) Reset Value = 0000 0000 Table 5. P1M2 Register P1M2 Address (E2h) Reset Value = 0000 0000 Input Pin Data 76 543 210 P1M1.7 P1M1.6 P1M1.5 P1M1.4 P1M1.3 P1M1.2 P1M1.1 P1M1.0 Bit Number Bit Mnemonic Description 0-7 P1M1.x Port Output configuration Bit See Table 2 for configuration definition 76 543 210 P1M2.7 P1M2.6 P1M2.5 P1M2.4 P1M2.3 P1M2.2 P1M2.1 P1M2.0 Bit Number Bit Mnemonic Description 0-7 P1M2.x Port Output configuration bit See Table 2 for configuration definition |
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