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IMX7DCEC Datasheet(PDF) 19 Page - NXP Semiconductors |
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IMX7DCEC Datasheet(HTML) 19 Page - NXP Semiconductors |
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19 / 161 page ![]() Modules list i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023 NXP Semiconductors 19 3.2 Recommended connections for unused analog interfaces Table 5 shows the recommended connections for unused analog interfaces. PCIE_REXT The impedance calibration process requires connection of reference resistor 4.7 K 1% precision resistor on PCIE_REXT pad to ground. USB_OTG1_REXT/USB_O TG2_REXT The bias generation and impedance calibration process for the USB OTG PHYs requires connection of 200 (1% precision) reference resistors on each of the USB_OTG1_REXT and USB_OTG2_REXT pads to ground. USB_OTG1_CHD_B An external pullup resistor with value in range from 10 k to 100 k should be connected between open-drain output USB_OTG1_CHD_B and supply VDD_USB_OTG1_3P3_IN for 3.3 V signaling. Optionally, a similarly valued pullup resistor could be connected instead between USB_OTG1_CHD_B and an unrelated supply up to 1.8 V, but in that case the output is only valid when both that supply and VDD_USB_OTG1_3P3_IN are powered. TEMPSENSOR_REXT External 100 K (1% precision) resistor connection pin Table 4. JTAG controller interface summary JTAG I/O Type On-chip Termination JTAG_TCK Input 47 kpull-up JTAG_TMS Input 47 kpull-up JTAG_TDI Input 47 kpull-up JTAG_TDO 3-state output 100 kpull-up JTAG_TRSTB Input 47 kpull-up JTAG_MOD Input 100 kpull-up Table 5. Recommended connections for unused analog interfaces Module Package Net Name Recommendation if Unused ADC VDDA_ADC2_1P8, VDDA_ADC2_1P8, VDDA_ADC1_1P8, VDDA_ADC1_1P8 1.8 V ADC2_IN3, ADC2_IN2, ADC2_IN1, ADC2_IN0, ADC1_IN0, ADC1_IN1, ADC1_IN2, ADC1_IN3 Tie to ground LDO VDD_1P2_CAP Floating if USB_HSIC is not used MIPI VDD_MIPI_1P0, VDDA_MIPI_1P8 Floating or tie to ground MIPI_DSI_D0_N, MIPI_DSI_D0_P, MIPI_VREG_0P4V, MIPI_DSI_CLK_N, MIPI_DSI_CLK_P, MIPI_DSI_D1_N, MIPI_DSI_D1_P, MIPI_CSI_D0_N, MIPI_CSI_D0_P, MIPI_CSI_CLK_N, MIPI_CSI_CLK_P, MIPI_CSI_D1_N, MIPI_CSI_D1_P No connect Table 3. Special signal considerations(continued) Signal Name Remarks |
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